{"id":"https://openalex.org/W2104928938","doi":"https://doi.org/10.1109/4.297692","title":"Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's","display_name":"Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's","publication_year":1994,"publication_date":"1994-01-01","ids":{"openalex":"https://openalex.org/W2104928938","doi":"https://doi.org/10.1109/4.297692","mag":"2104928938"},"language":"en","primary_location":{"id":"doi:10.1109/4.297692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.297692","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003351968","display_name":"T. Sakata","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Sakata","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111507015","display_name":"K. Itoh","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Itoh","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002525064","display_name":"Masashi Horiguchi","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Horiguchi","raw_affiliation_strings":["Central Research Laboratory, Hitachi and Limited, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Central Research Laboratory, Hitachi and Limited, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087707920","display_name":"Masakazu Aoki","orcid":"https://orcid.org/0000-0003-1951-8400"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Aoki","raw_affiliation_strings":["Semiconductor and Integrated Circuits Division, Hitachi and Limited, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Semiconductor and Integrated Circuits Division, Hitachi and Limited, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I65143321"],"apc_list":null,"apc_paid":null,"fwci":1.5643,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.83021017,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"29","issue":"8","first_page":"887","last_page":"894"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9097726941108704},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.632522463798523},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6026671528816223},{"id":"https://openalex.org/keywords/gigabit","display_name":"Gigabit","score":0.5907996892929077},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.5828393697738647},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5413396954536438},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.522266685962677},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5218086242675781},{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.5184985399246216},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4686267673969269},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.419140100479126},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3757706880569458},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3457295298576355},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3345004916191101},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.30014708638191223},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.24012964963912964},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23799508810043335},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.17818552255630493},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15510883927345276},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11806616187095642}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9097726941108704},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.632522463798523},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6026671528816223},{"id":"https://openalex.org/C21922175","wikidata":"https://www.wikidata.org/wiki/Q3105497","display_name":"Gigabit","level":2,"score":0.5907996892929077},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.5828393697738647},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5413396954536438},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.522266685962677},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5218086242675781},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.5184985399246216},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4686267673969269},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.419140100479126},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3757706880569458},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3457295298576355},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3345004916191101},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.30014708638191223},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.24012964963912964},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23799508810043335},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.17818552255630493},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15510883927345276},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11806616187095642},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/4.297692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.297692","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7599999904632568,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1533614470","https://openalex.org/W1593888571","https://openalex.org/W1779018616","https://openalex.org/W1882519492","https://openalex.org/W1971301746","https://openalex.org/W2031411958","https://openalex.org/W2057486448","https://openalex.org/W2061433717","https://openalex.org/W2072813462","https://openalex.org/W2097688694","https://openalex.org/W2104928938","https://openalex.org/W2117221953","https://openalex.org/W2140957071","https://openalex.org/W2147670217","https://openalex.org/W2152782894","https://openalex.org/W2156817051","https://openalex.org/W2161312910","https://openalex.org/W2173522374","https://openalex.org/W2174754727","https://openalex.org/W2467942550","https://openalex.org/W2787982885","https://openalex.org/W6719969595"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W2098207691","https://openalex.org/W3148568549","https://openalex.org/W2155827627","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W2269474412","https://openalex.org/W4386903460","https://openalex.org/W2806295079","https://openalex.org/W2543596171"],"abstract_inverted_index":{"A":[0],"two-dimensional":[1,29,35],"power-line":[2,36],"selection":[3],"scheme":[4,57,95],"for":[5,44,75,98],"an":[6],"iterative":[7],"CMOS":[8],"circuit":[9],"block":[10,22],"is":[11,23,39,96],"proposed":[12,94],"to":[13,41,66,72,89],"reduce":[14],"the":[15,100],"subthreshold":[16],"current.":[17],"In":[18],"this":[19],"scheme,":[20],"a":[21,28,59,76,86],"divided":[24],"into":[25],"sub-blocks":[26],"in":[27],"arrangement":[30],"and":[31],"selectively":[32],"energized":[33],"by":[34],"selection.":[37],"It":[38],"shown":[40],"be":[42],"suitable":[43],"dual":[45,81],"word-line":[46,82],"structure,":[47,83],"particularly":[48],"because":[49],"of":[50,63,103],"its":[51],"single":[52],"sub-word":[53],"line":[54],"activation.":[55],"This":[56],"achieves":[58],"very":[60],"large":[61],"reduction":[62],"active":[64,101],"current":[65],"one":[67],"sixteenth,":[68],"from":[69],"116":[70],"mA":[71,74],"22":[73],"1-V":[77],"16-Gb":[78],"DRAM":[79],"with":[80],"while":[84],"maintaining":[85],"speed":[87],"comparable":[88],"existing":[90],"multi-megabit":[91],"DRAM's.":[92],"The":[93],"promising":[97],"reducing":[99],"power":[102],"future":[104],"multi-gigabit":[105],"DRAM's.<":[106],"<ETX":[107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">&gt;</ETX>":[109]},"counts_by_year":[{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}