{"id":"https://openalex.org/W2736227289","doi":"https://doi.org/10.1109/3dic.2016.7970023","title":"3D floorplan representations: Corner links and partial order","display_name":"3D floorplan representations: Corner links and partial order","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2736227289","doi":"https://doi.org/10.1109/3dic.2016.7970023","mag":"2736227289"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2016.7970023","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2016.7970023","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110330219","display_name":"Fang Qiao","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fang Qiao","raw_affiliation_strings":["University of California San Diego, La Jolla, CA, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California San Diego, La Jolla, CA, US","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008689590","display_name":"Ilgweon Kang","orcid":"https://orcid.org/0000-0003-3842-5613"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ilgweon Kang","raw_affiliation_strings":["University of California San Diego, La Jolla, CA, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California San Diego, La Jolla, CA, US","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035962853","display_name":"Daniel M. Kane","orcid":"https://orcid.org/0000-0002-0220-9962"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel Kane","raw_affiliation_strings":["University of California San Diego, La Jolla, CA, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California San Diego, La Jolla, CA, US","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068187078","display_name":"Fung-Yu Young","orcid":null},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Fung-Yu Young","raw_affiliation_strings":["The Chinese University of Hong Kong, Shatin, Hong Kong"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong, Shatin, Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039615312","display_name":"Chung\u2010Kuan Cheng","orcid":"https://orcid.org/0000-0002-9865-8390"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chung-Kuan Cheng","raw_affiliation_strings":["University of California San Diego, La Jolla, CA, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California San Diego, La Jolla, CA, US","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005013807","display_name":"Ronald Graham","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ronald Graham","raw_affiliation_strings":["University of California San Diego, La Jolla, CA, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California San Diego, La Jolla, CA, US","institution_ids":["https://openalex.org/I36258959"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1782,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61200113,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10996","display_name":"Computational Geometry and Mesh Generation","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1704","display_name":"Computer Graphics and Computer-Aided Design"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9851670265197754},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.7459255456924438},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7433021068572998},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.6033620834350586},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5719433426856995},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.5393748879432678},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.5213924050331116},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4447599947452545},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4221128225326538},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3654208779335022},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3435421586036682},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.18338903784751892}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9851670265197754},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.7459255456924438},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7433021068572998},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.6033620834350586},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5719433426856995},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.5393748879432678},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.5213924050331116},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4447599947452545},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4221128225326538},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3654208779335022},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3435421586036682},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.18338903784751892},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/3dic.2016.7970023","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2016.7970023","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},{"id":"pmh:oai:escholarship.org:ark:/13030/qt8vz2f4g9","is_oa":false,"landing_page_url":"https://escholarship.org/uc/item/8vz2f4g9","pdf_url":null,"source":{"id":"https://openalex.org/S4306400115","display_name":"eScholarship (California Digital Library)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2801248553","host_organization_name":"California Digital Library","host_organization_lineage":["https://openalex.org/I2801248553"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities","score":0.800000011920929}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1497138450","https://openalex.org/W1544642978","https://openalex.org/W1971201733","https://openalex.org/W1981846784","https://openalex.org/W1983052212","https://openalex.org/W1997252335","https://openalex.org/W2002330922","https://openalex.org/W2026533407","https://openalex.org/W2030767815","https://openalex.org/W2099932375","https://openalex.org/W2106366463","https://openalex.org/W2112525223","https://openalex.org/W2127012874","https://openalex.org/W2143463537","https://openalex.org/W2144307665","https://openalex.org/W2156198260","https://openalex.org/W2165891825","https://openalex.org/W6629837845","https://openalex.org/W6632759405","https://openalex.org/W6642928034","https://openalex.org/W6678589545"],"related_works":["https://openalex.org/W2133901311","https://openalex.org/W2087871358","https://openalex.org/W2136768364","https://openalex.org/W4386643835","https://openalex.org/W2120361800","https://openalex.org/W2182445672","https://openalex.org/W2124495928","https://openalex.org/W2096129555","https://openalex.org/W2097517502","https://openalex.org/W2005457717"],"abstract_inverted_index":{"Data/algorithmic":[0],"representations":[1,31],"of":[2,15,23,77],"3D":[3,16,29,56],"floorplans":[4],"for":[5,83],"integrated":[6],"circuits":[7],"is":[8],"an":[9],"essential":[10],"problem":[11],"in":[12,41],"the":[13,39,68,75,78],"study":[14],"VLSI":[17],"circuits.":[18],"Given":[19],"a":[20,42,54],"fixed":[21],"number":[22],"rectangular":[24],"blocks":[25],"and":[26,35,52,72,87],"their":[27,33,84],"volume,":[28],"floorplan":[30,57],"describe":[32],"orientations":[34],"positions":[36],"relative":[37],"to":[38,67],"origin":[40],"three":[43],"dimensional":[44],"space.":[45],"In":[46],"our":[47],"study,":[48],"we":[49,59],"1).":[50],"present":[51],"analyze":[53],"novel":[55],"representation":[58],"call":[60],"corner":[61],"links,":[62],"2).":[63],"give":[64],"new":[65],"analysis":[66],"partial":[69],"order":[70],"representation,":[71,80],"3).":[73],"discuss":[74],"equivalence":[76],"two":[79],"provide":[81],"algorithms":[82],"mutual":[85],"reducibility,":[86],"inspect":[88],"several":[89],"key":[90],"properties.":[91]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-25T21:42:39.735039","created_date":"2017-07-21T00:00:00"}