{"id":"https://openalex.org/W2152991730","doi":"https://doi.org/10.1109/3dic.2015.7334604","title":"Proposed static timing analysis framework for extracted 3D integrated circuits (3D-STA)","display_name":"Proposed static timing analysis framework for extracted 3D integrated circuits (3D-STA)","publication_year":2015,"publication_date":"2015-08-01","ids":{"openalex":"https://openalex.org/W2152991730","doi":"https://doi.org/10.1109/3dic.2015.7334604","mag":"2152991730"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2015.7334604","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2015.7334604","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088042221","display_name":"Mohamed N. ElBahey","orcid":null},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":true,"raw_author_name":"Mohamed N. ElBahey","raw_affiliation_strings":["ECE Department, Ain Shams University, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"ECE Department, Ain Shams University, Cairo, Egypt","institution_ids":["https://openalex.org/I107720978"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056838032","display_name":"Diaa Khalil","orcid":"https://orcid.org/0000-0002-2067-2002"},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"DiaaEldin S. Khalil","raw_affiliation_strings":["ECE Department, Ain Shams University, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"ECE Department, Ain Shams University, Cairo, Egypt","institution_ids":["https://openalex.org/I107720978"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087597892","display_name":"Hani Ragai","orcid":"https://orcid.org/0000-0002-7999-8824"},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Hani F. Ragai","raw_affiliation_strings":["ECE Department, Ain Shams University, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"ECE Department, Ain Shams University, Cairo, Egypt","institution_ids":["https://openalex.org/I107720978"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5088042221"],"corresponding_institution_ids":["https://openalex.org/I107720978"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.07643036,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"TS8.33.1","last_page":"TS8.33.4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.7974371910095215},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7252240777015686},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.652780294418335},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6164448261260986},{"id":"https://openalex.org/keywords/footprint","display_name":"Footprint","score":0.5664675235748291},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.5453776717185974},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5371559262275696},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5152323842048645},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.47096970677375793},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.46637895703315735},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4649476110935211},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.439815491437912},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.43211933970451355},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4311067461967468},{"id":"https://openalex.org/keywords/planar","display_name":"Planar","score":0.42437753081321716},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.41430237889289856},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.34808745980262756},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32857614755630493},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2773277163505554},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2697681784629822},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.2655641734600067},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.20492222905158997},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15994682908058167}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.7974371910095215},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7252240777015686},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.652780294418335},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6164448261260986},{"id":"https://openalex.org/C132943942","wikidata":"https://www.wikidata.org/wiki/Q2562511","display_name":"Footprint","level":2,"score":0.5664675235748291},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.5453776717185974},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5371559262275696},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5152323842048645},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.47096970677375793},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.46637895703315735},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4649476110935211},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.439815491437912},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.43211933970451355},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4311067461967468},{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.42437753081321716},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.41430237889289856},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.34808745980262756},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32857614755630493},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2773277163505554},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2697681784629822},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2655641734600067},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.20492222905158997},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15994682908058167},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/3dic.2015.7334604","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2015.7334604","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1984588379","https://openalex.org/W2005226599","https://openalex.org/W2096452073","https://openalex.org/W2133965199","https://openalex.org/W2144149750","https://openalex.org/W2154363431","https://openalex.org/W6674620451"],"related_works":["https://openalex.org/W2376726667","https://openalex.org/W2357425846","https://openalex.org/W162881505","https://openalex.org/W2376028644","https://openalex.org/W2000205915","https://openalex.org/W4245549415","https://openalex.org/W1965232212","https://openalex.org/W2094617370","https://openalex.org/W2038193917","https://openalex.org/W2106584483"],"abstract_inverted_index":{"3D":[0,33,61,74,100],"integration":[1],"of":[2],"digital":[3,86,102],"designs":[4,34,62],"presents":[5,111],"an":[6,93],"important":[7],"paradigm":[8],"shift":[9],"that":[10,96],"introduces":[11],"several":[12],"benefits":[13],"in":[14,84],"speed,":[15],"power,":[16],"area,":[17],"and":[18,35,56,91,120,131],"footprint.":[19],"Significant":[20],"work":[21,51],"has":[22],"been":[23],"done":[24],"so":[25],"far":[26],"to":[27,31,58],"enable":[28],"CAD":[29,48],"tools":[30,57],"handle":[32,59],"account":[36],"for":[37,80,129],"TSVs.":[38],"Yet,":[39],"it":[40],"is":[41],"not":[42],"as":[43,45,104,134],"mainstream":[44],"conventional":[46],"planar":[47,108],"tools.":[49],"This":[50],"explores":[52],"enabling":[53],"existing":[54],"flow":[55],"full":[60,73,99],"without":[63],"introducing":[64],"drastic":[65],"changes":[66],"or":[67],"excessive":[68],"computations.":[69],"It":[70,89,110],"focuses":[71],"on":[72,113],"design":[75,87],"STA":[76,94],"with":[77],"routing":[78,132],"parasitics":[79],"its":[81],"critical":[82],"importance":[83],"the":[85,114],"flow.":[88],"proposes":[90],"implements":[92],"framework":[95,124],"efficiently":[97],"handles":[98],"extracted":[101],"designs,":[103],"well":[105],"as,":[106],"regular":[107],"ones.":[109],"details":[112],"TSV":[115],"extraction":[116],"model,":[117],"connectivity":[118],"representation,":[119],"delay":[121],"calculations.":[122],"The":[123],"can":[125],"be":[126],"easily":[127],"adapted":[128],"placement":[130],"optimizations":[133],"well.":[135]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
