{"id":"https://openalex.org/W1966285468","doi":"https://doi.org/10.1109/3dic.2013.6702393","title":"Optimal stacking of SOCs in a 3D-SIC for post-bond testing","display_name":"Optimal stacking of SOCs in a 3D-SIC for post-bond testing","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1966285468","doi":"https://doi.org/10.1109/3dic.2013.6702393","mag":"1966285468"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2013.6702393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2013.6702393","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087927094","display_name":"Manjari Pradhan","orcid":null},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Manjari Pradhan","raw_affiliation_strings":["Dept. of Computer Science, Jadavpur University, Jadavpur, Kolkata, India","Dept. of Comput. Sci., Jadavpur Univ., Jadavpur, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science, Jadavpur University, Jadavpur, Kolkata, India","institution_ids":["https://openalex.org/I170979836"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Jadavpur Univ., Jadavpur, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033232210","display_name":"Chandan Giri","orcid":"https://orcid.org/0000-0003-3687-6242"},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Chandan Giri","raw_affiliation_strings":["Dept of Information Technology, Bengal Engineering and Science University Shibpur, Howrah, India","Department of Information Technology, Bengal Engineering and Science University, Shibpur, Howrah, India"],"affiliations":[{"raw_affiliation_string":"Dept of Information Technology, Bengal Engineering and Science University Shibpur, Howrah, India","institution_ids":["https://openalex.org/I98365261"]},{"raw_affiliation_string":"Department of Information Technology, Bengal Engineering and Science University, Shibpur, Howrah, India","institution_ids":["https://openalex.org/I98365261"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082934529","display_name":"Hafizur Rahaman","orcid":"https://orcid.org/0000-0001-9012-5437"},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Hafizur Rahaman","raw_affiliation_strings":["Dept of Information Technology, Bengal Engineering and Science University Shibpur, Howrah, India","Department of Information Technology, Bengal Engineering and Science University, Shibpur, Howrah, India"],"affiliations":[{"raw_affiliation_string":"Dept of Information Technology, Bengal Engineering and Science University Shibpur, Howrah, India","institution_ids":["https://openalex.org/I98365261"]},{"raw_affiliation_string":"Department of Information Technology, Bengal Engineering and Science University, Shibpur, Howrah, India","institution_ids":["https://openalex.org/I98365261"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059700720","display_name":"Debesh K. Das","orcid":"https://orcid.org/0000-0003-1736-1497"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Debesh K. Das","raw_affiliation_strings":["Dept. of Computer Science, Jadavpur University, Jadavpur, Kolkata, India","Dept. of Comput. Sci., Jadavpur Univ., Jadavpur, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science, Jadavpur University, Jadavpur, Kolkata, India","institution_ids":["https://openalex.org/I170979836"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Jadavpur Univ., Jadavpur, India","institution_ids":["https://openalex.org/I170979836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5087927094"],"corresponding_institution_ids":["https://openalex.org/I170979836"],"apc_list":null,"apc_paid":null,"fwci":0.6304,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.67342202,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"32","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.9368136525154114},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.9030102491378784},{"id":"https://openalex.org/keywords/sequence","display_name":"Sequence (biology)","score":0.5698100924491882},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5055832862854004},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48392730951309204},{"id":"https://openalex.org/keywords/semiconductor-device-fabrication","display_name":"Semiconductor device fabrication","score":0.411918967962265},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.40800514817237854},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4047996997833252},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3201303780078888},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.28066951036453247},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.11205995082855225},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10144546627998352}],"concepts":[{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.9368136525154114},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.9030102491378784},{"id":"https://openalex.org/C2778112365","wikidata":"https://www.wikidata.org/wiki/Q3511065","display_name":"Sequence (biology)","level":2,"score":0.5698100924491882},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5055832862854004},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48392730951309204},{"id":"https://openalex.org/C66018809","wikidata":"https://www.wikidata.org/wiki/Q1570432","display_name":"Semiconductor device fabrication","level":3,"score":0.411918967962265},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.40800514817237854},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4047996997833252},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3201303780078888},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.28066951036453247},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.11205995082855225},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10144546627998352},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/3dic.2013.6702393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2013.6702393","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1588964015","https://openalex.org/W1971322722","https://openalex.org/W1972808197","https://openalex.org/W1987131925","https://openalex.org/W1994257370","https://openalex.org/W2010009884","https://openalex.org/W2011039300","https://openalex.org/W2023223749","https://openalex.org/W2023264348","https://openalex.org/W2026282245","https://openalex.org/W2043004448","https://openalex.org/W2044864162","https://openalex.org/W2046574526","https://openalex.org/W2070914725","https://openalex.org/W2075403904","https://openalex.org/W2082046960","https://openalex.org/W2103022917","https://openalex.org/W2103799547","https://openalex.org/W2104548962","https://openalex.org/W2113911387","https://openalex.org/W2121926956","https://openalex.org/W2122636510","https://openalex.org/W2136854849","https://openalex.org/W2143502515","https://openalex.org/W2144149750","https://openalex.org/W2413544148","https://openalex.org/W2503952136","https://openalex.org/W2540160898","https://openalex.org/W2545928799","https://openalex.org/W3012668504","https://openalex.org/W3143398174","https://openalex.org/W4244496923","https://openalex.org/W6652984335","https://openalex.org/W6728978539"],"related_works":["https://openalex.org/W2184170131","https://openalex.org/W2330571978","https://openalex.org/W2016970881","https://openalex.org/W2543049871","https://openalex.org/W2333804548","https://openalex.org/W1990828594","https://openalex.org/W3093450488","https://openalex.org/W2027159884","https://openalex.org/W2016589506","https://openalex.org/W3163301441"],"abstract_inverted_index":{"3D":[0,21,67],"IC":[1],"testing":[2,16],"is":[3,23,94],"one":[4],"of":[5,17,31,43,48,61],"the":[6,10,27,41,45,58,73,88,100],"major":[7],"concern":[8],"in":[9,65],"semiconductor":[11],"industry":[12],"today.":[13],"Multiple":[14],"subsequent":[15],"partial":[18,49],"stack":[19,50,53],"during":[20],"assembly":[22],"required":[24],"due":[25],"to":[26,81,86],"die":[28],"stacking":[29,59,84],"steps":[30],"thinning,":[32],"alignment":[33],"and":[34,51,99],"bonding.":[35],"In":[36],"this":[37,83],"paper":[38],"we":[39],"address":[40],"problem":[42],"minimizing":[44],"total":[46,74],"time":[47],"complete":[52],"testing.":[54],"We":[55,77],"analyze":[56],"how":[57],"sequence":[60,85],"different":[62],"System-on-Chips":[63],"(SOCs)":[64],"a":[66],"Stacked":[68],"Integrated":[69],"Circuit":[70],"(SIC)":[71],"affects":[72],"test":[75,90],"time.":[76,91],"propose":[78],"an":[79],"algorithm":[80,93],"find":[82],"achieve":[87],"minimum":[89],"Our":[92],"run":[95],"on":[96],"ITC'02":[97],"benchmarks":[98],"results":[101],"are":[102],"shown.":[103]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}