{"id":"https://openalex.org/W2129164191","doi":"https://doi.org/10.1109/3dic.2013.6702390","title":"Design of a 3-D stacked floating-point adder","display_name":"Design of a 3-D stacked floating-point adder","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W2129164191","doi":"https://doi.org/10.1109/3dic.2013.6702390","mag":"2129164191"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2013.6702390","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2013.6702390","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074517992","display_name":"Jubee Tada","orcid":null},"institutions":[{"id":"https://openalex.org/I112524849","display_name":"Yamagata University","ror":"https://ror.org/00xy44n04","country_code":"JP","type":"education","lineage":["https://openalex.org/I112524849"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Jubee Tada","raw_affiliation_strings":["Graduate School of Science and Engineering, Yamagata University, Yonezawa, Japan","[Grad. Sch. of Sci. & Eng., Yamagata Univ., Yonezawa, Japan]"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Engineering, Yamagata University, Yonezawa, Japan","institution_ids":["https://openalex.org/I112524849"]},{"raw_affiliation_string":"[Grad. Sch. of Sci. & Eng., Yamagata Univ., Yonezawa, Japan]","institution_ids":["https://openalex.org/I112524849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033954091","display_name":"Ryusuke Egawa","orcid":"https://orcid.org/0000-0001-8966-867X"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ryusuke Egawa","raw_affiliation_strings":["Research Division on Supercomputing Systems, Tohoku University, Sendai, Japan","Res. Div. on Supercomput. Syst., Tohoku Univ., Sendai, Japan"],"affiliations":[{"raw_affiliation_string":"Research Division on Supercomputing Systems, Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Res. Div. on Supercomput. Syst., Tohoku Univ., Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059505921","display_name":"Hiroaki Kobayashi","orcid":"https://orcid.org/0000-0001-6705-9515"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroaki Kobayashi","raw_affiliation_strings":["Research Division on Supercomputing Systems, Tohoku University, Sendai, Japan","Res. Div. on Supercomput. Syst., Tohoku Univ., Sendai, Japan"],"affiliations":[{"raw_affiliation_string":"Research Division on Supercomputing Systems, Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Res. Div. on Supercomput. Syst., Tohoku Univ., Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5074517992"],"corresponding_institution_ids":["https://openalex.org/I112524849"],"apc_list":null,"apc_paid":null,"fwci":0.2364,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63057741,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9883999824523926,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9482550024986267},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6606549024581909},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.617996335029602},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.5331648588180542},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.5119110345840454},{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.4840885400772095},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.44453370571136475},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.44151216745376587},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.42218217253685},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3890150785446167},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1583852767944336},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1055658757686615},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07753065228462219}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9482550024986267},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6606549024581909},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.617996335029602},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.5331648588180542},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.5119110345840454},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.4840885400772095},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.44453370571136475},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.44151216745376587},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.42218217253685},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3890150785446167},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1583852767944336},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1055658757686615},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07753065228462219},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/3dic.2013.6702390","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2013.6702390","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.4399999976158142,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309545","display_name":"Synopsys","ror":"https://ror.org/013by2m91"},{"id":"https://openalex.org/F4320322832","display_name":"University of Tokyo","ror":"https://ror.org/057zh3y96"},{"id":"https://openalex.org/F4320338075","display_name":"Core Research for Evolutional Science and Technology","ror":"https://ror.org/00097mb19"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1971590811","https://openalex.org/W1971966678","https://openalex.org/W2043443161","https://openalex.org/W2043843580","https://openalex.org/W2086716781","https://openalex.org/W2103398239","https://openalex.org/W2106240397","https://openalex.org/W2106554902","https://openalex.org/W2113921965","https://openalex.org/W3148607552","https://openalex.org/W4230375614","https://openalex.org/W6675308991","https://openalex.org/W6675846507","https://openalex.org/W6676676458"],"related_works":["https://openalex.org/W3215589575","https://openalex.org/W3150959508","https://openalex.org/W4297795876","https://openalex.org/W1571090276","https://openalex.org/W3037505396","https://openalex.org/W2012407419","https://openalex.org/W2773283032","https://openalex.org/W2336476964","https://openalex.org/W2239119680","https://openalex.org/W1973800584"],"abstract_inverted_index":{"Three-dimensional":[0],"(3-D)":[1],"stacked":[2,39,82,121,140],"integrated":[3,19,31],"circuit":[4],"(SIC)":[5],"technologies":[6,26],"have":[7],"been":[8],"expected":[9],"to":[10,28,59,151,157],"overcome":[11],"the":[12,15,35,42,61,64,98,107,112,138,158],"limitation":[13],"in":[14],"design":[16,36],"of":[17,37,63,100,118],"microprocessors":[18],"by":[20],"two-dimensional":[21],"(2-D)":[22],"implementations.":[23],"3-D":[24,38,65,81,120],"SIC":[25],"enable":[27],"stack":[29],"multiple":[30],"silicon":[32],"layers.":[33],"In":[34,57,73],"arithmetic":[40],"units,":[41],"circuits":[43],"are":[44,85,88,125],"partitioned":[45],"into":[46],"several":[47],"subcircuits,":[48],"and":[49,106,132],"each":[50],"sub-circuit":[51],"is":[52],"placed":[53],"on":[54,90,97,111,128,146],"one":[55],"layer.":[56],"order":[58],"exploit":[60],"potential":[62],"SIC,":[66],"a":[67,80,101,119,152],"sophisticated":[68],"partitioning":[69,77,130],"should":[70],"be":[71],"required.":[72],"this":[74],"paper,":[75],"four":[76,147],"patterns":[78,131],"for":[79],"floating-point":[83,123,143],"adder":[84,124,144],"proposed,":[86],"which":[87],"based":[89,127],"two":[91],"basic":[92],"ideas.":[93],"One":[94],"idea":[95,109],"focuses":[96,110],"structure":[99],"2-path":[102],"floating":[103],"point":[104],"adder,":[105],"other":[108],"large":[113],"barrel":[114],"shifters.":[115],"Four":[116],"implementations":[117],"double-precision":[122],"designed":[126],"these":[129],"evaluated.":[133],"Experimental":[134],"results":[135],"show":[136],"that":[137],"3D":[139],"double":[141],"precision":[142],"implemented":[145],"layers":[148],"achieves":[149],"up":[150],"16.4%":[153],"delay":[154],"reduction":[155],"compared":[156],"2-D":[159],"implementation.":[160]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
