{"id":"https://openalex.org/W1989073365","doi":"https://doi.org/10.1109/3dic.2010.5751465","title":"Performance analysis of 3-D monolithic integrated circuits","display_name":"Performance analysis of 3-D monolithic integrated circuits","publication_year":2010,"publication_date":"2010-11-01","ids":{"openalex":"https://openalex.org/W1989073365","doi":"https://doi.org/10.1109/3dic.2010.5751465","mag":"1989073365"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2010.5751465","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2010.5751465","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/154732","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111926197","display_name":"Shashikanth Bobba","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Shashikanth Bobba","raw_affiliation_strings":["Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","[Integrated Systems Laboratory (LSI), EPFL, Switzerland]"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"[Integrated Systems Laboratory (LSI), EPFL, Switzerland]","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111891819","display_name":"Ashutosh Chakraborty","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ashutosh Chakraborty","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Technology, Austin, USA","Dept. of Electrical & Computer Engineering, University of Texas, Austin, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Technology, Austin, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069473217","display_name":"Olivier Thomas","orcid":"https://orcid.org/0000-0001-7240-5259"},"institutions":[{"id":"https://openalex.org/I3020098449","display_name":"CEA Grenoble","ror":"https://ror.org/02mg6n827","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I3020098449"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210150049","display_name":"Laboratoire d'\u00c9lectronique des Technologies de l'Information","ror":"https://ror.org/04mf0wv34","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I4210117989","https://openalex.org/I4210150049"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Olivier Thomas","raw_affiliation_strings":["CEA-LETI/MINATEC, Grenoble, France","CEA-LETI/MINATEC, 17 rue de Martyrs, 38000 Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CEA-LETI/MINATEC, Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I899635006","https://openalex.org/I106785703","https://openalex.org/I3020098449","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA-LETI/MINATEC, 17 rue de Martyrs, 38000 Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I899635006","https://openalex.org/I106785703","https://openalex.org/I3020098449","https://openalex.org/I2738703131"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045610872","display_name":"P. Batude","orcid":null},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210150049","display_name":"Laboratoire d'\u00c9lectronique des Technologies de l'Information","ror":"https://ror.org/04mf0wv34","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I4210117989","https://openalex.org/I4210150049"]},{"id":"https://openalex.org/I3020098449","display_name":"CEA Grenoble","ror":"https://ror.org/02mg6n827","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I3020098449"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Perrine Batude","raw_affiliation_strings":["CEA-LETI/MINATEC, Grenoble, France","CEA-LETI/MINATEC, 17 rue de Martyrs, 38000 Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CEA-LETI/MINATEC, Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I899635006","https://openalex.org/I106785703","https://openalex.org/I3020098449","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA-LETI/MINATEC, 17 rue de Martyrs, 38000 Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I899635006","https://openalex.org/I106785703","https://openalex.org/I3020098449","https://openalex.org/I2738703131"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031542707","display_name":"Vasilis F. Pavlidis","orcid":"https://orcid.org/0000-0002-4063-4652"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Vasilis F. Pavlidis","raw_affiliation_strings":["Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","[Integrated Systems Laboratory (LSI), EPFL, Switzerland]"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"[Integrated Systems Laboratory (LSI), EPFL, Switzerland]","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072927296","display_name":"Giovanni De Micheli","orcid":"https://orcid.org/0000-0002-7827-3215"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Giovanni De Micheli","raw_affiliation_strings":["Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","[Integrated Systems Laboratory (LSI), EPFL, Switzerland]"],"affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory (LSI), EPF Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"[Integrated Systems Laboratory (LSI), EPFL, Switzerland]","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5111926197"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.1764,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.80152538,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.740872859954834},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6212613582611084},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5853404998779297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5622856616973877},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5369192361831665},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5365455746650696},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49218741059303284},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4529319405555725},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.42218613624572754},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.41608747839927673},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2537573575973511},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22496238350868225},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18794772028923035},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18530303239822388},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07634267210960388}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.740872859954834},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6212613582611084},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5853404998779297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5622856616973877},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5369192361831665},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5365455746650696},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49218741059303284},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4529319405555725},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.42218613624572754},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.41608747839927673},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2537573575973511},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22496238350868225},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18794772028923035},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18530303239822388},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07634267210960388},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":5,"locations":[{"id":"doi:10.1109/3dic.2010.5751465","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2010.5751465","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International 3D Systems Integration Conference (3DIC)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/7828844d-b527-4130-9939-e9a9237f40aa","is_oa":false,"landing_page_url":"https://research.manchester.ac.uk/en/publications/7828844d-b527-4130-9939-e9a9237f40aa","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Bobba, S, Chakraborty, A, Thomas, O, Batude, P, Pavlidis, V F & De Micheli, G 2010, Performance analysis of 3-D monolithic integrated circuits. in IEEE 3D System Integration Conference 2010, 3DIC 2010|IEEE 3D Syst. Integr. Conf., 3DIC. IEEE, 2nd IEEE International 3D System Integration Conference, 3DIC 2010, Munich, 1/07/10. https://doi.org/10.1109/3DIC.2010.5751465","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.370.8180","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.370.8180","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://icwww.epfl.ch/~demichel/publications/archive/2010/3DIC_finalV.1.pdf","raw_type":"text"},{"id":"pmh:oai:infoscience.epfl.ch:154732","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/154732","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:pure.atira.dk:publications/7828844d-b527-4130-9939-e9a9237f40aa","is_oa":false,"landing_page_url":"https://www.research.manchester.ac.uk/portal/en/publications/performance-analysis-of-3d-monolithic-integrated-circuits(7828844d-b527-4130-9939-e9a9237f40aa).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Bobba, S, Chakraborty, A, Thomas, O, Batude, P, Pavlidis, V F & De Micheli, G 2010, Performance analysis of 3-D monolithic integrated circuits. in IEEE 3D System Integration Conference 2010, 3DIC 2010|IEEE 3D Syst. Integr. Conf., 3DIC. IEEE, 2nd IEEE International 3D System Integration Conference, 3DIC 2010, Munich, 1/07/10. https://doi.org/10.1109/3DIC.2010.5751465","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:154732","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/154732","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1751600266","https://openalex.org/W1977873933","https://openalex.org/W1981823766","https://openalex.org/W2002041333","https://openalex.org/W2037771006","https://openalex.org/W2042314125","https://openalex.org/W2046574526","https://openalex.org/W2106240397","https://openalex.org/W2111066189","https://openalex.org/W2113734460","https://openalex.org/W2129785295","https://openalex.org/W2144149750","https://openalex.org/W3148607552","https://openalex.org/W4245549415","https://openalex.org/W6637775719"],"related_works":["https://openalex.org/W2163902997","https://openalex.org/W4224903767","https://openalex.org/W2085575131","https://openalex.org/W1570060921","https://openalex.org/W2161666177","https://openalex.org/W2154296321","https://openalex.org/W2101206166","https://openalex.org/W4246766117","https://openalex.org/W2082630917","https://openalex.org/W1989073365"],"abstract_inverted_index":{"3-D":[0,43,67,87,150],"monolithic":[1],"integration":[2,44,65],"(3DMI),":[3],"also":[4],"termed":[5],"as":[6,126],"sequential":[7,24],"integration,":[8],"is":[9,32,138,159,187,202],"a":[10,98,122,127,133,142,181],"potential":[11],"technology":[12,107],"for":[13,166,189,194],"future":[14],"gigascale":[15],"circuits.":[16],"Since":[17],"the":[18,26,29,39,51,75,79,91,102,105,153,195],"device":[19],"layers":[20,61],"are":[21,119,146],"processed":[22],"in":[23,38,152,164,184],"order,":[25],"size":[27],"of":[28,41,53,66,77,97,104,112,129,141],"vertical":[30],"contacts":[31,36],"similar":[33],"to":[34,89,177],"traditional":[35],"unlike":[37],"case":[40],"parallel":[42],"with":[45],"through":[46],"silicon":[47],"vias":[48],"(FSVs).":[49],"Given":[50],"advantage":[52],"such":[54,62],"small":[55],"contacts,":[56],"3DMI":[57,106],"supports":[58],"stacking":[59],"active":[60,84],"that":[63],"fine-grain":[64],"circuits":[68,168],"can":[69],"be":[70],"implemented.":[71],"This":[72],"paper":[73],"extends":[74],"idea":[76],"constructing":[78],"standard":[80],"cells":[81,151],"across":[82],"two":[83,115],"layers,":[85],"forming":[86],"cells,":[88],"reduce":[90],"overall":[92],"area":[93],"and":[94,132],"interconnect":[95],"wirelength":[96,165,170],"circuit.":[99],"To":[100],"demonstrate":[101],"effect":[103],"on":[108],"these":[109],"important":[110,116],"parameters":[111],"circuit":[113,131],"design,":[114],"communication":[117],"blocks":[118],"evaluated.":[120],"Specifically,":[121],"low-density-parity-check":[123],"(LDPC)":[124],"decoder":[125],"sample":[128],"interconnect-dominated":[130],"data-encryption-standard":[134],"(DES)":[135],"block,":[136],"which":[137],"good":[139],"instance":[140],"gate":[143],"dominated":[144],"circuit,":[145],"investigated.":[147],"By":[148],"employing":[149],"conventional":[154],"design":[155],"flow":[156],"chain,":[157],"there":[158],"more":[160],"than":[161],"10%":[162],"decrease":[163],"both":[167],"(in":[169],"driven":[171,179],"placement":[172,180],"mode).":[173],"However,":[174],"when":[175],"subjected":[176],"timing":[178],"slight":[182],"reduction":[183,200],"delay":[185,199],"(1.6%)":[186],"observed":[188],"an":[190],"LDPC":[191],"decoder,":[192],"whereas":[193],"DES":[196],"block":[197],"considerable":[198],"(14.22%)":[201],"achieved.":[203]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}