{"id":"https://openalex.org/W2119911998","doi":"https://doi.org/10.1109/3dic.2009.5306542","title":"Electrical modeling of Through Silicon and Package Vias","display_name":"Electrical modeling of Through Silicon and Package Vias","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2119911998","doi":"https://doi.org/10.1109/3dic.2009.5306542","mag":"2119911998"},"language":"en","primary_location":{"id":"doi:10.1109/3dic.2009.5306542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2009.5306542","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Conference on 3D System Integration","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072670970","display_name":"Tapobrata Bandyopadhyay","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tapobrata Bandyopadhyay","raw_affiliation_strings":["Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"affiliations":[{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059853729","display_name":"Ritwik Chatterjee","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ritwik Chatterjee","raw_affiliation_strings":["Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"affiliations":[{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113664220","display_name":"Daehyun Chung","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daehyun Chung","raw_affiliation_strings":["Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"affiliations":[{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085554167","display_name":"Madhavan Swaminathan","orcid":"https://orcid.org/0000-0003-1729-2807"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Madhavan Swaminathan","raw_affiliation_strings":["Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"affiliations":[{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045655197","display_name":"Rao Tummala","orcid":"https://orcid.org/0000-0003-2284-7600"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rao Tummala","raw_affiliation_strings":["Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"affiliations":[{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Microsystems Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5072670970"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":13.0966,"has_fulltext":false,"cited_by_count":123,"citation_normalized_percentile":{"value":0.99085373,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11661","display_name":"Copper Interconnects and Reliability","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.8194116353988647},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.7539589405059814},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5737033486366272},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5660576820373535},{"id":"https://openalex.org/keywords/system-in-package","display_name":"System in package","score":0.5461307168006897},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.5406441688537598},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4973180592060089},{"id":"https://openalex.org/keywords/electromagnetic-simulation","display_name":"Electromagnetic simulation","score":0.493507981300354},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.4869862496852875},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46911007165908813},{"id":"https://openalex.org/keywords/semiconductor","display_name":"Semiconductor","score":0.4573577642440796},{"id":"https://openalex.org/keywords/semiconductor-device","display_name":"Semiconductor device","score":0.42114654183387756},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.42009907960891724},{"id":"https://openalex.org/keywords/semiconductor-device-modeling","display_name":"Semiconductor device modeling","score":0.4154830574989319},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.411638081073761},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3629191517829895},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.33100634813308716},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2936505079269409},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.13026165962219238},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.10749450325965881},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10177785158157349},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.08814892172813416}],"concepts":[{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.8194116353988647},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.7539589405059814},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5737033486366272},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5660576820373535},{"id":"https://openalex.org/C146667757","wikidata":"https://www.wikidata.org/wiki/Q1457198","display_name":"System in package","level":3,"score":0.5461307168006897},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.5406441688537598},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4973180592060089},{"id":"https://openalex.org/C2984061966","wikidata":"https://www.wikidata.org/wiki/Q5157313","display_name":"Electromagnetic simulation","level":2,"score":0.493507981300354},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.4869862496852875},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46911007165908813},{"id":"https://openalex.org/C108225325","wikidata":"https://www.wikidata.org/wiki/Q11456","display_name":"Semiconductor","level":2,"score":0.4573577642440796},{"id":"https://openalex.org/C79635011","wikidata":"https://www.wikidata.org/wiki/Q175805","display_name":"Semiconductor device","level":3,"score":0.42114654183387756},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.42009907960891724},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.4154830574989319},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.411638081073761},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3629191517829895},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.33100634813308716},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2936505079269409},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.13026165962219238},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.10749450325965881},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10177785158157349},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.08814892172813416},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/3dic.2009.5306542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/3dic.2009.5306542","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International Conference on 3D System Integration","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5699999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1595708959","https://openalex.org/W1978300964","https://openalex.org/W2005220526","https://openalex.org/W2098473989","https://openalex.org/W2128259088","https://openalex.org/W2137893918","https://openalex.org/W2141361504","https://openalex.org/W2145903584","https://openalex.org/W2154240714","https://openalex.org/W2166803207","https://openalex.org/W3147289055","https://openalex.org/W4240608581"],"related_works":["https://openalex.org/W2062396011","https://openalex.org/W2038246670","https://openalex.org/W2352615856","https://openalex.org/W2145790809","https://openalex.org/W2099819736","https://openalex.org/W4366260607","https://openalex.org/W2010609468","https://openalex.org/W2188988152","https://openalex.org/W2002219888","https://openalex.org/W2152715401"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"analytical":[3],"modeling":[4],"and":[5,45,65,72],"3D":[6,54],"full-wave":[7],"electromagnetic":[8],"(EM)":[9],"simulation":[10],"of":[11,19,29,43,53],"the":[12,30,36],"bias":[13],"voltage":[14],"dependent":[15],"semiconductor":[16,37],"(MOS)":[17],"capacitance":[18,64],"a":[20],"Through":[21],"Silicon":[22],"Via":[23],"(TSV).":[24],"An":[25],"accurate":[26],"electrical":[27,41],"model":[28],"TSV":[31,63],"is":[32,60],"proposed":[33],"by":[34,51],"considering":[35],"effects.":[38],"The":[39],"high-frequency":[40],"performance":[42],"TSVs":[44],"Through-Package":[46],"Vias":[47],"(TPVs)":[48],"are":[49,68],"compared":[50],"means":[52],"EM":[55],"simulations.":[56],"A":[57],"parametric":[58],"study":[59],"performed":[61],"on":[62],"design":[66],"guidelines":[67],"presented":[69],"for":[70],"signal":[71],"power":[73],"TSVs.":[74]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":12},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":16},{"year":2014,"cited_by_count":16},{"year":2013,"cited_by_count":19},{"year":2012,"cited_by_count":14}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}