{"id":"https://openalex.org/W2060850170","doi":"https://doi.org/10.1093/ietele/e90-c.2.531","title":"Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode","display_name":"Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode","publication_year":2007,"publication_date":"2007-02-01","ids":{"openalex":"https://openalex.org/W2060850170","doi":"https://doi.org/10.1093/ietele/e90-c.2.531","mag":"2060850170"},"language":"en","primary_location":{"id":"doi:10.1093/ietele/e90-c.2.531","is_oa":false,"landing_page_url":"https://doi.org/10.1093/ietele/e90-c.2.531","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110485005","display_name":"T. Honda","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T. HONDA","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019784173","display_name":"N. SAKIMURA","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. SAKIMURA","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111921651","display_name":"Tadahiko Sugibayashi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T. SUGIBAYASHI","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113667570","display_name":"N. Kasai","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. KASAI","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053096033","display_name":"H. Hada","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H. HADA","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5110117383","display_name":"S. Tahara","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S.-i. TAHARA","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3592,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.65424516,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"E90-C","issue":"2","first_page":"531","last_page":"535"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.904266893863678},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.46035975217819214},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4410635232925415},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.26134878396987915},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16009590029716492},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.0999174416065216}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.904266893863678},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.46035975217819214},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4410635232925415},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.26134878396987915},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16009590029716492},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.0999174416065216}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1093/ietele/e90-c.2.531","is_oa":false,"landing_page_url":"https://doi.org/10.1093/ietele/e90-c.2.531","pdf_url":null,"source":{"id":"https://openalex.org/S2489501747","display_name":"IEICE Transactions on Electronics","issn_l":"0916-8524","issn":["0916-8524","1745-1353"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Transactions on Electronics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"id":"https://metadata.un.org/sdg/4","display_name":"Quality Education"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W3108899305","https://openalex.org/W2141626281","https://openalex.org/W2086829516","https://openalex.org/W2472395098","https://openalex.org/W1908441109","https://openalex.org/W2128922810","https://openalex.org/W2118756465","https://openalex.org/W2138259888"],"abstract_inverted_index":{"We":[0],"propose":[1],"a":[2,17,42,81],"writing":[3,26,57,77],"circuit":[4],"scheme":[5,38],"to":[6,39,59],"screen":[7],"intermittent":[8,33],"failure":[9],"cells":[10],"for":[11,85],"toggle":[12],"MRAM.":[13],"The":[14],"scheme,":[15],"comprising":[16],"current":[18,43,58,64,78],"waveform":[19,55,65],"circuitry":[20,66],"that":[21,60],"controls":[22],"rise/fall":[23],"time":[24],"of":[25,32,56,70],"current,":[27],"drastically":[28],"decreases":[29],"the":[30,37,54,63,76],"probability":[31],"failure.":[34],"To":[35],"apply":[36],"large-capacity":[40,89],"MRAMs,":[41],"booster":[44],"containing":[45],"discharging":[46],"capacitors":[47,72],"has":[48],"also":[49],"been":[50],"developed.":[51],"It":[52],"adjusts":[53],"designed":[61],"by":[62],"even":[67],"in":[68,88],"presence":[69],"parasitic":[71],"and":[73],"resistors":[74],"along":[75],"path.":[79],"Such":[80],"technique":[82],"is":[83],"essential":[84],"achieving":[86],"stability":[87],"MRAMs.":[90]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}