{"id":"https://openalex.org/W2074516902","doi":"https://doi.org/10.1093/comjnl/bxm123","title":"Multiplier Evolution: A Family of Multiplier VLSI Implementations","display_name":"Multiplier Evolution: A Family of Multiplier VLSI Implementations","publication_year":2008,"publication_date":"2008-02-27","ids":{"openalex":"https://openalex.org/W2074516902","doi":"https://doi.org/10.1093/comjnl/bxm123","mag":"2074516902"},"language":"en","primary_location":{"id":"doi:10.1093/comjnl/bxm123","is_oa":false,"landing_page_url":"https://doi.org/10.1093/comjnl/bxm123","pdf_url":null,"source":{"id":"https://openalex.org/S44643521","display_name":"The Computer Journal","issn_l":"0010-4620","issn":["0010-4620","1460-2067"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310311648","host_organization_name":"Oxford University Press","host_organization_lineage":["https://openalex.org/P4310311648","https://openalex.org/P4310311647"],"host_organization_lineage_names":["Oxford University Press","University of Oxford"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The Computer Journal","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006557067","display_name":"Glenn Colon-Bonet","orcid":null},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"G. Colon-Bonet","raw_affiliation_strings":["Formerly employed by Hewlett Packard Company, 3400 E. Harmony Road, Fort Collins, CO 80528, USA","Intel Corporation, Mailstop TEC1-1, 4701 Technology Pkwy, Fort Collins, CO 80528, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Formerly employed by Hewlett Packard Company, 3400 E. Harmony Road, Fort Collins, CO 80528, USA","institution_ids":["https://openalex.org/I1324840837"]},{"raw_affiliation_string":"Intel Corporation, Mailstop TEC1-1, 4701 Technology Pkwy, Fort Collins, CO 80528, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068222588","display_name":"Paul Winterrowd","orcid":null},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]},{"id":"https://openalex.org/I155093810","display_name":"University of Idaho","ror":"https://ror.org/03hbp5t65","country_code":"US","type":"education","lineage":["https://openalex.org/I155093810"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Winterrowd","raw_affiliation_strings":["Formerly employed by Hewlett Packard Company, 3400 E. Harmony Road, Fort Collins, CO 80528, USA","University of Idaho, Center for Advanced Microelectronics and Biomolecular Research, 721 Lochsa Street, Suite 8, Post Falls, ID 83854, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Formerly employed by Hewlett Packard Company, 3400 E. Harmony Road, Fort Collins, CO 80528, USA","institution_ids":["https://openalex.org/I1324840837"]},{"raw_affiliation_string":"University of Idaho, Center for Advanced Microelectronics and Biomolecular Research, 721 Lochsa Street, Suite 8, Post Falls, ID 83854, USA","institution_ids":["https://openalex.org/I155093810"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5006557067"],"corresponding_institution_ids":["https://openalex.org/I1324840837","https://openalex.org/I1343180700"],"apc_list":{"value":2635,"currency":"GBP","value_usd":3232},"apc_paid":null,"fwci":1.0076,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.77935395,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"51","issue":"5","first_page":"585","last_page":"594"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.8337149620056152},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7655833959579468},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6515074968338013},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5937212705612183},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4538522958755493},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.45030367374420166},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3858143389225006},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3710373640060425},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2652614414691925},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25509244203567505},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17479208111763}],"concepts":[{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.8337149620056152},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7655833959579468},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6515074968338013},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5937212705612183},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4538522958755493},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.45030367374420166},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3858143389225006},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3710373640060425},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2652614414691925},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25509244203567505},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17479208111763},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1093/comjnl/bxm123","is_oa":false,"landing_page_url":"https://doi.org/10.1093/comjnl/bxm123","pdf_url":null,"source":{"id":"https://openalex.org/S44643521","display_name":"The Computer Journal","issn_l":"0010-4620","issn":["0010-4620","1460-2067"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310311648","host_organization_name":"Oxford University Press","host_organization_lineage":["https://openalex.org/P4310311648","https://openalex.org/P4310311647"],"host_organization_lineage_names":["Oxford University Press","University of Oxford"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The Computer Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1492630251","https://openalex.org/W1518251951","https://openalex.org/W1596644655","https://openalex.org/W1830905284","https://openalex.org/W1983849809","https://openalex.org/W2026445983","https://openalex.org/W2033311622","https://openalex.org/W2080083189","https://openalex.org/W2098734407","https://openalex.org/W2104733895","https://openalex.org/W2125117969","https://openalex.org/W2163852930","https://openalex.org/W2166785110"],"related_works":["https://openalex.org/W2134640991","https://openalex.org/W2101501703","https://openalex.org/W1505993080","https://openalex.org/W3204445529","https://openalex.org/W2064769413","https://openalex.org/W3202032712","https://openalex.org/W1617740971","https://openalex.org/W3186509556","https://openalex.org/W1997297921","https://openalex.org/W2073728955"],"abstract_inverted_index":{"This":[0],"paper":[1],"provides":[2],"an":[3],"overview":[4],"of":[5,21,31,64],"four":[6],"floating":[7],"point":[8],"multiplier":[9,23,72],"implementations":[10],"spanning":[11],"microprocessor":[12],"designs":[13,60],"from":[14,42],"1992":[15],"to":[16,47],"the":[17],"present.":[18],"The":[19,39,59],"algorithm":[20],"each":[22,52],"is":[24],"explored":[25],"in":[26,71],"detail,":[27],"and":[28,34],"key":[29],"measures":[30],"area,":[32],"delay":[33],"design":[35],"complexity":[36],"are":[37],"compared.":[38],"approaches":[40],"span":[41],"a":[43,48,62,68],"simple":[44],"linear":[45],"array":[46],"full":[49],"tree-based":[50],"network,":[51],"targeted":[53],"at":[54],"efficient":[55],"very-large-scale":[56],"integration":[57],"implementation.":[58],"show":[61],"progression":[63],"implementation":[65],"techniques":[66],"encompassing":[67],"20\u00d7":[69],"increase":[70],"performance":[73],"during":[74],"this":[75],"time":[76],"period.":[77]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-23T06:36:01.041984","created_date":"2025-10-10T00:00:00"}
