{"id":"https://openalex.org/W1987847196","doi":"https://doi.org/10.1080/10655140290010088","title":"COPAS: A New Algorithm for the Partial Input Encoding Problem","display_name":"COPAS: A New Algorithm for the Partial Input Encoding Problem","publication_year":2000,"publication_date":"2000-05-23","ids":{"openalex":"https://openalex.org/W1987847196","doi":"https://doi.org/10.1080/10655140290010088","mag":"1987847196"},"language":"en","primary_location":{"id":"doi:10.1080/10655140290010088","is_oa":true,"landing_page_url":"https://doi.org/10.1080/10655140290010088","pdf_url":"https://downloads.hindawi.com/archive/2002/376792.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2002/376792.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046749112","display_name":"Manuel Mart\u00ednez","orcid":"https://orcid.org/0000-0001-6020-7618"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210110387","display_name":"Microelectronica (Romania)","ror":"https://ror.org/01keak954","country_code":"RO","type":"company","lineage":["https://openalex.org/I4210110387"]}],"countries":["ES","RO"],"is_corresponding":false,"raw_author_name":"Manuel Mart\u00ednez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n","institution_ids":["https://openalex.org/I4210110387","https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031060766","display_name":"M.J. Avedillo","orcid":"https://orcid.org/0000-0002-8345-8441"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210110387","display_name":"Microelectronica (Romania)","ror":"https://ror.org/01keak954","country_code":"RO","type":"company","lineage":["https://openalex.org/I4210110387"]}],"countries":["ES","RO"],"is_corresponding":true,"raw_author_name":"Mar\u00eda J. Avedillo","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n","institution_ids":["https://openalex.org/I4210110387","https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054229228","display_name":"Jos\u00e9 M. Quintana","orcid":"https://orcid.org/0000-0003-2170-7876"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210110387","display_name":"Microelectronica (Romania)","ror":"https://ror.org/01keak954","country_code":"RO","type":"company","lineage":["https://openalex.org/I4210110387"]}],"countries":["ES","RO"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 M. Quintana","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n","institution_ids":["https://openalex.org/I4210110387","https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103617569","display_name":"Jos\u00e9 L. Huertas","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210110387","display_name":"Microelectronica (Romania)","ror":"https://ror.org/01keak954","country_code":"RO","type":"company","lineage":["https://openalex.org/I4210110387"]}],"countries":["ES","RO"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 L. Huertas","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, Edif. CICA, Avda. Reina Mercedes s/n","institution_ids":["https://openalex.org/I4210110387","https://openalex.org/I4210104545"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5031060766"],"corresponding_institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I4210110387"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.0852821,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":"2","first_page":"171","last_page":"181"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9901999831199646,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9901999831199646,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9883999824523926,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9814000129699707,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.8147952556610107},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.7040420770645142},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.6171086430549622},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6003837585449219},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.532473087310791},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.516841471195221},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4586835205554962},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4311741292476654},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.34090954065322876},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.33615928888320923},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.33199289441108704},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.20658797025680542},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09879854321479797}],"concepts":[{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.8147952556610107},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.7040420770645142},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.6171086430549622},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6003837585449219},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.532473087310791},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.516841471195221},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4586835205554962},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4311741292476654},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.34090954065322876},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.33615928888320923},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.33199289441108704},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.20658797025680542},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09879854321479797},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1080/10655140290010088","is_oa":true,"landing_page_url":"https://doi.org/10.1080/10655140290010088","pdf_url":"https://downloads.hindawi.com/archive/2002/376792.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:digital.csic.es:10261/85226","is_oa":true,"landing_page_url":"http://hdl.handle.net/10261/85226","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Art\u00edculo"},{"id":"pmh:oai:dnet:idus________::5f6282cbad67f2d5b500906ebe7f414d","is_oa":true,"landing_page_url":"https://idus.us.es/handle/11441/63676","pdf_url":null,"source":{"id":"https://openalex.org/S4306402641","display_name":"LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Cient\u00edficas)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4383465926","host_organization_name":"LA Referencia","host_organization_lineage":["https://openalex.org/I4383465926"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:idus.us.es:11441/63676","is_oa":true,"landing_page_url":"https://idus.us.es/xmlui/handle/11441/63676","pdf_url":null,"source":{"id":"https://openalex.org/S4306400333","display_name":"idUS (Universidad de Sevilla)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79238269","host_organization_name":"Universidad de Sevilla","host_organization_lineage":["https://openalex.org/I79238269"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"doi:10.1080/10655140290010088","is_oa":true,"landing_page_url":"https://doi.org/10.1080/10655140290010088","pdf_url":"https://downloads.hindawi.com/archive/2002/376792.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1987847196.pdf","grobid_xml":"https://content.openalex.org/works/W1987847196.grobid-xml"},"referenced_works_count":12,"referenced_works":["https://openalex.org/W142838967","https://openalex.org/W1670814263","https://openalex.org/W1993937043","https://openalex.org/W1995501342","https://openalex.org/W1996501408","https://openalex.org/W2004540799","https://openalex.org/W2105761964","https://openalex.org/W2109097182","https://openalex.org/W2115731525","https://openalex.org/W2118330187","https://openalex.org/W2142648109","https://openalex.org/W6648668970"],"related_works":["https://openalex.org/W1975289146","https://openalex.org/W2105887828","https://openalex.org/W2087240539","https://openalex.org/W4236520801","https://openalex.org/W2807251790","https://openalex.org/W2122599759","https://openalex.org/W2355022049","https://openalex.org/W2060429446","https://openalex.org/W2741782512","https://openalex.org/W1537234410"],"abstract_inverted_index":{"Frequently,":[0],"the":[1,22,43,68,77,92,95,114,120],"logic":[2],"designer":[3],"deals":[4],"with":[5,7],"functions":[6],"symbolic":[8],"input":[9,27,70,125],"variables.":[10],"The":[11,86,127],"binary":[12],"encoding":[13,28,71],"of":[14,76,83,88,94,116,123],"such":[15,60],"symbols":[16,57],"should":[17],"be":[18],"chosen":[19],"to":[20,112,145],"optimize":[21],"final":[23],"implementation.":[24],"Conventionally,":[25],"this":[26],"(IE)":[29],"problem":[30,72,79,97],"has":[31,98],"been":[32,99],"solved":[33],"in":[34,141],"a":[35,54,74,133],"two\u2010step":[36],"process.":[37],"First":[38],"step":[39],"generates":[40,81],"constraints":[41,62,90],"on":[42,132],"relationship":[44],"between":[45],"codes":[46,82],"for":[47],"different":[48],"symbols,":[49],"called":[50],"group":[51,89],"constraints.":[52],"In":[53],"following":[55],"step,":[56],"are":[58,63],"encoded":[59],"that":[61,106,136],"satisfied.":[64],"This":[65,101],"paper":[66,102],"addresses":[67],"partial":[69],"(PIE),":[73],"variation":[75],"IE":[78],"which":[80,110],"minimum":[84],"length.":[85],"role":[87],"within":[91],"framework":[93],"PIE":[96],"questioned.":[100],"describes":[103],"an":[104],"algorithm":[105],"unlike":[107],"conventional":[108],"approaches,":[109],"try":[111],"maximize":[113],"number":[115],"satisfied":[117],"constraints,":[118],"targets":[119],"economical":[121],"implementation":[122],"each":[124],"constraint.":[126],"proposed":[128],"approach":[129],"is":[130],"based":[131],"powerful":[134],"heuristic":[135],"produces":[137],"high":[138],"quality":[139],"results":[140],"shorter":[142],"time":[143],"compared":[144],"previous":[146],"algorithm.":[147]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}