{"id":"https://openalex.org/W2024953467","doi":"https://doi.org/10.1049/iet-net.2011.0054","title":"Mixed-signal transmitter chip with digital bridge and analogue front-end for XDSL in home networks","display_name":"Mixed-signal transmitter chip with digital bridge and analogue front-end for XDSL in home networks","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2024953467","doi":"https://doi.org/10.1049/iet-net.2011.0054","mag":"2024953467"},"language":"en","primary_location":{"id":"doi:10.1049/iet-net.2011.0054","doi":"https://doi.org/10.1049/iet-net.2011.0054","is_oa":false,"landing_page_url":"https://doi.org/10.1049/iet-net.2011.0054","pdf_url":null,"source":{"id":"https://openalex.org/S4306418855","display_name":"IET Networks","issn_l":"2047-4954","issn":["2047-4954","2047-4962"],"is_oa":false,"is_in_doaj":true,"is_core":true,"listed_in":["cwts-core","doaj","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Networks","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086985499","display_name":"Guo\u2010Ming Sung","orcid":"https://orcid.org/0000-0002-2442-2983","observed_orcids":["https://orcid.org/0000-0002-2442-2983"]},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"G.M. Sung","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"middle","author":{"id":null,"display_name":"H.Y. Hsieh","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"H.Y. Hsieh","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045695527","display_name":"Cui Yu","orcid":"https://orcid.org/0000-0002-7656-879X","observed_orcids":["https://orcid.org/0000-0002-7656-879X"]},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C.P. Yu","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University of Technology, Taipei, 10608, Taiwan","institution_ids":["https://openalex.org/I118292597"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I118292597"],"apc_list":{"value":2390,"currency":"USD","value_usd":2390},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12585255,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":"3","first_page":"181","last_page":"188"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.47049999237060547,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.47049999237060547,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12146","display_name":"Power Line Communications and Noise","score":0.2992999851703644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.11879999935626984,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/xdsl","display_name":"xDSL","score":0.902999997138977},{"id":"https://openalex.org/keywords/home-network","display_name":"home network","score":0.8169999718666077},{"id":"https://openalex.org/keywords/digital-bridge","display_name":"digital bridge","score":0.9079999923706055},{"id":"https://openalex.org/keywords/analog-front-end","display_name":"analog front-end","score":0.984000027179718},{"id":"https://openalex.org/keywords/line-driver","display_name":"line driver","score":0.7440000176429749},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"low-pass filter","score":0.7089999914169312},{"id":"https://openalex.org/keywords/segmented-dac","display_name":"segmented DAC","score":0.753000020980835},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"clock synchronization","score":0.44699999690055847},{"id":"https://openalex.org/keywords/low-voltage-design","display_name":"low-voltage design","score":0.492000013589859}],"concepts":[{"id":"https://openalex.org/C2778870119","wikidata":"https://www.wikidata.org/wiki/Q16002927","display_name":"Analog front-end","level":3,"score":0.575127363204956},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5047119855880737},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4290599822998047},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.42607787251472473},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42514345049858093},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3801994323730469},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3500719666481018},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.21109488606452942},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.19215798377990723}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1049/iet-net.2011.0054","doi":"https://doi.org/10.1049/iet-net.2011.0054","is_oa":false,"landing_page_url":"https://doi.org/10.1049/iet-net.2011.0054","pdf_url":null,"source":{"id":"https://openalex.org/S4306418855","display_name":"IET Networks","issn_l":"2047-4954","issn":["2047-4954","2047-4962"],"is_oa":false,"is_in_doaj":true,"is_core":true,"listed_in":["cwts-core","doaj","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Networks","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.8970999717712402,"display_name":"Industry, innovation and infrastructure"}],"sustainable_development_goals_aurora":[{"id":"https://metadata.un.org/sdg/11","score":0.5299999713897705,"display_name":"Sustainable cities and communities"}],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1986204459","https://openalex.org/W1994748865","https://openalex.org/W1996129760","https://openalex.org/W2008361301","https://openalex.org/W2093640534","https://openalex.org/W2099679337","https://openalex.org/W2113284539","https://openalex.org/W2118713198","https://openalex.org/W2144818230","https://openalex.org/W2150534733","https://openalex.org/W2152292589","https://openalex.org/W2167854474","https://openalex.org/W2170427144"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2355663289","https://openalex.org/W2106913410","https://openalex.org/W4380372336","https://openalex.org/W2354248671","https://openalex.org/W2359134391","https://openalex.org/W2594116857","https://openalex.org/W2157521655","https://openalex.org/W4385719427","https://openalex.org/W2103401584"],"abstract_inverted_index":{"This":[0],"study":[1],"presents":[2],"a":[3,28,51,57,68,72,75,80,102,118,124,128,147,160,166,185],"mixed-signal":[4,11],"transmitter":[5],"chip":[6,55],"that":[7,31],"is":[8,23,32,107,121,151,163,178],"fabricated":[9],"using":[10,50,123,180],"0.18-\u03bcm":[12],"complementary":[13],"metal":[14],"oxide":[15],"semiconductor":[16],"technology":[17],"in":[18],"home":[19],"network.":[20],"The":[21,53],"purpose":[22],"not":[24],"only":[25],"to":[26,44,109,113,133,143,153,169],"design":[27],"digital":[29,81,145,176],"bridge":[30,177],"located":[33],"between":[34],"the":[35,38,46,135,144,171,175,181],"Ethernet":[36],"and":[37,79,96,112,127,139,159],"asynchronous":[39],"transfer":[40],"mode,":[41],"but":[42],"also":[43],"control":[45,131,170],"packet":[47],"flow":[48],"without":[49],"microprocessor.":[52],"proposed":[54],"comprises":[56],"transmitting":[58],"path":[59],"circuitry":[60],"of":[61,67],"analogue":[62],"front-end":[63],"(AFE),":[64],"which":[65,83],"consists":[66],"line":[69],"driver":[70],"(LD),":[71],"low-pass":[73],"filter,":[74],"digital-to-analogue":[76],"converter":[77],"(DAC)":[78],"bridge,":[82,146],"includes":[84],"five":[85],"blocks":[86],"\u2013":[87],"frequency-division":[88],"block,":[89,91,93],"sub-receiver":[90],"sub-counter":[92],"utopia":[94],"block":[95,162],"first-in-first-out":[97],"(FIFO)":[98],"block.":[99],"In":[100],"AFE,":[101],"segmented":[103],"10":[104],"bits":[105],"DAC":[106],"used":[108],"eliminate":[110],"glitches":[111],"reduce":[114,134],"differential":[115],"non-linearity":[116],"errors;":[117],"low-voltage":[119],"LD":[120],"designed":[122,179],"feed-forward":[125],"capacitor":[126],"quiescent":[129],"current":[130],"circuit":[132],"zero":[136],"crossover":[137],"distortion":[138],"harmonics.":[140],"With":[141],"respect":[142],"synchronised":[148,156],"source":[149],"code":[150],"provided":[152],"produce":[154],"three":[155],"clock":[157],"signals,":[158],"FIFO":[161],"applied":[164],"as":[165],"traffic":[167,172],"management":[168],"quality.":[173],"Notably,":[174],"bottom-up":[182],"approach":[183],"with":[184],"small":[186],"latency.":[187]},"counts_by_year":[],"updated_date":"2026-09-29T14:09:16.559479","created_date":"2025-10-10T00:00:00"}