{"id":"https://openalex.org/W2039536413","doi":"https://doi.org/10.1049/iet-cdt:20060073","title":"Functional-oriented mask-based built-in self-test","display_name":"Functional-oriented mask-based built-in self-test","publication_year":2007,"publication_date":"2007-09-04","ids":{"openalex":"https://openalex.org/W2039536413","doi":"https://doi.org/10.1049/iet-cdt:20060073","mag":"2039536413"},"language":"en","primary_location":{"id":"doi:10.1049/iet-cdt:20060073","is_oa":false,"landing_page_url":"https://doi.org/10.1049/iet-cdt:20060073","pdf_url":null,"source":{"id":"https://openalex.org/S28293273","display_name":"IET Computers & Digital Techniques","issn_l":"1751-8601","issn":["1751-8601","1751-861X"],"is_oa":false,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310311714","host_organization_name":"Institution of Engineering and Technology","host_organization_lineage":["https://openalex.org/P4310311714"],"host_organization_lineage_names":["Institution of Engineering and Technology"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Computers &amp; Digital Techniques","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047445549","display_name":"Marcelino Santos","orcid":"https://orcid.org/0000-0002-2091-1165"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"M.B. Santos","raw_affiliation_strings":["IST/INESC-ID, R. Alves Redol, 9, Lisboa, 1000-029, Portugal"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IST/INESC-ID, R. Alves Redol, 9, Lisboa, 1000-029, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058862498","display_name":"J.P. Teixeira","orcid":"https://orcid.org/0000-0002-0379-6257"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"J. Paulo Teixeira","raw_affiliation_strings":["IST/INESC-ID, R. Alves Redol, 9, Lisboa, 1000-029, Portugal"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IST/INESC-ID, R. Alves Redol, 9, Lisboa, 1000-029, Portugal","institution_ids":["https://openalex.org/I121345201"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I121345201"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.10044459,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"1","issue":"5","first_page":"491","last_page":"498"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.6093350648880005},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.5816950798034668},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5813232660293579},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5592204332351685},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4055940508842468},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3989393711090088},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3774205446243286},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.1383049190044403}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.6093350648880005},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.5816950798034668},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5813232660293579},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5592204332351685},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4055940508842468},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3989393711090088},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3774205446243286},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.1383049190044403}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1049/iet-cdt:20060073","is_oa":false,"landing_page_url":"https://doi.org/10.1049/iet-cdt:20060073","pdf_url":null,"source":{"id":"https://openalex.org/S28293273","display_name":"IET Computers & Digital Techniques","issn_l":"1751-8601","issn":["1751-8601","1751-861X"],"is_oa":false,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310311714","host_organization_name":"Institution of Engineering and Technology","host_organization_lineage":["https://openalex.org/P4310311714"],"host_organization_lineage_names":["Institution of Engineering and Technology"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Computers &amp; Digital Techniques","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W53227076","https://openalex.org/W1595368737","https://openalex.org/W1891950198","https://openalex.org/W1905213452","https://openalex.org/W2032559669","https://openalex.org/W2103258167","https://openalex.org/W2120511739","https://openalex.org/W2124629389","https://openalex.org/W2130669161","https://openalex.org/W2133867898","https://openalex.org/W2137549092","https://openalex.org/W2155298431","https://openalex.org/W2155976207","https://openalex.org/W2171435607","https://openalex.org/W2177819593","https://openalex.org/W2537440096","https://openalex.org/W4232026127"],"related_works":["https://openalex.org/W2157191248","https://openalex.org/W2107525390","https://openalex.org/W2150046587","https://openalex.org/W2164493372","https://openalex.org/W2153086993","https://openalex.org/W2114980936","https://openalex.org/W2118697956","https://openalex.org/W4245595174","https://openalex.org/W2115513740","https://openalex.org/W2539511314"],"abstract_inverted_index":{"Built-in":[0],"self-test":[1],"(BIST)":[2],"is":[3,16,85,146,148,189],"a":[4,88,106,131,157,183,190],"key":[5],"design-for-testability":[6],"technique":[7],"for":[8,53,142,195],"digital":[9],"systems":[10],"in":[11,119,156],"nanometre":[12],"technologies.":[13],"BIST":[14,62,84,91,107,128],"design":[15,92],"usually":[17],"quite":[18],"intrusive.":[19],"In":[20],"fact,":[21],"BIST-per-scan":[22,184],"or":[23,36],"BIST-per-clock":[24],"schemes":[25],"require":[26],"the":[27,110,179,196,209],"replacement":[28],"of":[29,201,208],"all":[30],"circuit":[31,101,159],"registers":[32,37],"by":[33,61],"modified":[34],"flip-flops":[35],"with":[38,109,165,169,174,182],"extra":[39],"functionality,":[40],"which":[41,143],"may":[42],"lead":[43,125],"to":[44,73,103,126,150],"unacceptable":[45],"area":[46],"overhead":[47,177],"and,":[48],"especially,":[49],"performance":[50,57,145,171],"degradation.":[51],"However,":[52],"some":[54],"applications,":[55],"system":[56,135,144],"cannot":[58],"be":[59,74,117,161],"compromised":[60],"insertion.":[63],"Moreover,":[64],"many":[65],"applications":[66],"have":[67],"multiple":[68,120,166],"clock":[69,121,167],"domains":[70],"and":[71,100,124,130,173,198,204],"need":[72],"self-tested":[75],"at":[76],"speed,":[77],"during":[78],"product":[79],"lifetime.":[80],"The":[81,94,186],"functional-oriented":[82],"mask-based":[83],"proposed":[86,95],"as":[87],"minimum":[89,170],"impact":[90,133],"methodology.":[93],"approach":[96],"uses":[97],"testability":[98],"metrics":[99],"functionality":[102],"iteratively":[104],"obtain":[105],"solution":[108],"required":[111],"fault":[112],"coverage":[113],"(FC).":[114],"It":[115],"can":[116,160],"implemented":[118],"domain":[122,192],"designs":[123],"short":[127],"sessions":[129],"limited":[132],"on":[134],"performance.":[136],"A":[137],"real":[138],"world":[139],"case":[140,187],"study,":[141],"critical,":[147],"used":[149],"demonstrate":[151],"that":[152],"high":[153],"FC":[154],"values":[155],"sequential":[158],"achieved,":[162],"operating":[163],"at-speed":[164],"signals,":[168],"degradation":[172],"lower":[175],"hardware":[176],"than":[178],"one":[180],"obtained":[181],"solution.":[185],"study":[188],"two-clock":[191],"Sync":[193],"core":[194],"Synchronisation":[197],"Link":[199],"Board":[200],"electromagnetic":[202],"calorimeter":[203,206],"hadron":[205],"detectors":[207],"CERN":[210],"compact":[211],"Muon":[212],"solenoid":[213],"experiment.":[214]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}
