{"id":"https://openalex.org/W4387906171","doi":"https://doi.org/10.1049/2023/8833764","title":"Design of Binary and Ternary Logic Inverters Based on Silicon Feedback FETs Using TCAD Simulator","display_name":"Design of Binary and Ternary Logic Inverters Based on Silicon Feedback FETs Using TCAD Simulator","publication_year":2023,"publication_date":"2023-01-01","ids":{"openalex":"https://openalex.org/W4387906171","doi":"https://doi.org/10.1049/2023/8833764"},"language":"en","primary_location":{"id":"doi:10.1049/2023/8833764","is_oa":true,"landing_page_url":"https://doi.org/10.1049/2023/8833764","pdf_url":"https://downloads.hindawi.com/journals/ietcds/2023/8833764.pdf","source":{"id":"https://openalex.org/S4210208150","display_name":"IET Circuits Devices & Systems","issn_l":"1751-858X","issn":["1751-858X","1751-8598"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310311714","host_organization_name":"Institution of Engineering and Technology","host_organization_lineage":["https://openalex.org/P4310311714"],"host_organization_lineage_names":["Institution of Engineering and Technology"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Circuits, Devices & Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ietcds/2023/8833764.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037671352","display_name":"Ashkan Horri","orcid":"https://orcid.org/0000-0003-4187-8883"},"institutions":[{"id":"https://openalex.org/I2801771032","display_name":"Islamic Azad University, Arak","ror":"https://ror.org/02558wk32","country_code":"IR","type":"education","lineage":["https://openalex.org/I110525433","https://openalex.org/I2801771032"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Ashkan Horri","raw_affiliation_strings":["Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak","Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak, Iran"],"raw_orcid":"https://orcid.org/0000-0003-4187-8883","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak","institution_ids":["https://openalex.org/I2801771032"]},{"raw_affiliation_string":"Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak, Iran","institution_ids":["https://openalex.org/I2801771032"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5037671352"],"corresponding_institution_ids":["https://openalex.org/I2801771032"],"apc_list":{"value":2000,"currency":"EUR","value_usd":2200},"apc_paid":{"value":2000,"currency":"EUR","value_usd":2200},"fwci":0.2498,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.54251535,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"2023","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.8686676025390625},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.7859041690826416},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4789572060108185},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.449971079826355},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4433450400829315},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3948568105697632},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3755038380622864},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36460965871810913},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.35592877864837646},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.34581905603408813},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.33685407042503357},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32131609320640564},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.26816436648368835},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20483821630477905},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.0833275318145752}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.8686676025390625},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.7859041690826416},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4789572060108185},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.449971079826355},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4433450400829315},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3948568105697632},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3755038380622864},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36460965871810913},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.35592877864837646},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34581905603408813},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.33685407042503357},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32131609320640564},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26816436648368835},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20483821630477905},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.0833275318145752},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1049/2023/8833764","is_oa":true,"landing_page_url":"https://doi.org/10.1049/2023/8833764","pdf_url":"https://downloads.hindawi.com/journals/ietcds/2023/8833764.pdf","source":{"id":"https://openalex.org/S4210208150","display_name":"IET Circuits Devices & Systems","issn_l":"1751-858X","issn":["1751-858X","1751-8598"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310311714","host_organization_name":"Institution of Engineering and Technology","host_organization_lineage":["https://openalex.org/P4310311714"],"host_organization_lineage_names":["Institution of Engineering and Technology"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Circuits, Devices & Systems","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:c03bcad6275a4eb2963dabe682b3caef","is_oa":true,"landing_page_url":"https://doaj.org/article/c03bcad6275a4eb2963dabe682b3caef","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IET Circuits, Devices and Systems, Vol 2023 (2023)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1049/2023/8833764","is_oa":true,"landing_page_url":"https://doi.org/10.1049/2023/8833764","pdf_url":"https://downloads.hindawi.com/journals/ietcds/2023/8833764.pdf","source":{"id":"https://openalex.org/S4210208150","display_name":"IET Circuits Devices & Systems","issn_l":"1751-858X","issn":["1751-858X","1751-8598"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310311714","host_organization_name":"Institution of Engineering and Technology","host_organization_lineage":["https://openalex.org/P4310311714"],"host_organization_lineage_names":["Institution of Engineering and Technology"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IET Circuits, Devices & Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":false},"content_urls":{"pdf":"https://content.openalex.org/works/W4387906171.pdf"},"referenced_works_count":22,"referenced_works":["https://openalex.org/W1199176172","https://openalex.org/W1988441194","https://openalex.org/W2023183681","https://openalex.org/W2025516544","https://openalex.org/W2110584581","https://openalex.org/W2146422686","https://openalex.org/W2161300695","https://openalex.org/W2169245181","https://openalex.org/W2280505881","https://openalex.org/W2328385021","https://openalex.org/W2497772283","https://openalex.org/W2546558113","https://openalex.org/W2570369295","https://openalex.org/W2622732489","https://openalex.org/W2738840447","https://openalex.org/W2774885524","https://openalex.org/W2786439219","https://openalex.org/W2964852374","https://openalex.org/W3007913125","https://openalex.org/W3102020185","https://openalex.org/W4206207265","https://openalex.org/W4280626220"],"related_works":["https://openalex.org/W2417422674","https://openalex.org/W4287750387","https://openalex.org/W2059661740","https://openalex.org/W3039944263","https://openalex.org/W2005804090","https://openalex.org/W2044964419","https://openalex.org/W1480295782","https://openalex.org/W2023587177","https://openalex.org/W2558171807","https://openalex.org/W2226796451"],"abstract_inverted_index":{"A":[0],"feedback":[1,13],"field":[2],"effect":[3],"transistor":[4],"(FBFET)":[5],"with":[6,56,84,135,167],"p\u2010n\u2010p\u2010n":[7],"structure":[8],"benefits":[9],"from":[10],"a":[11,61,115],"positive":[12],"mechanism.":[14],"In":[15,71],"this":[16,72,163],"structure,":[17],"the":[18,93,101,107,122,147,159],"accumulated":[19],"charges":[20],"in":[21,54,92],"its":[22,31,150],"potential":[23,33],"well":[24],"and":[25,46,75,99,149],"limitation":[26],"of":[27,106,125,146,162],"carrier":[28],"flow":[29],"by":[30,81,113],"internal":[32],"barrier":[34],"lead":[35],"to":[36],"superior":[37],"electrical":[38,160],"properties":[39,161],"such":[40,67],"as":[41,68],"lower":[42],"subthreshold":[43],"swing":[44],"(SS)":[45],"higher":[47],"I":[48,51,129,132],"ON":[49,130],"/":[50,131],"OFF":[52,133],"ratio":[53,134],"comparison":[55],"FinFET.":[57],"Thus,":[58],"FBFET":[59],"is":[60,111],"promising":[62],"alternative":[63],"for":[64,128],"digital":[65],"applications":[66],"logic":[69,77],"inverters.":[70],"paper,":[73],"binary":[74,102],"ternary":[76,104],"inverters":[78],"are":[79,165],"designed":[80],"using":[82,114],"FBFETs":[83],"40":[85],"nm":[86],"channel":[87],"length.":[88],"The":[89,109,119,142],"doping":[90,153],"profile":[91],"device":[94],"plays":[95],"an":[96,136],"essential":[97],"role":[98],"specifies":[100],"or":[103],"operation":[105],"inverter.":[108],"inverter":[110,148,164,169],"analyzed":[112],"TCAD":[116],"mixed\u2010mode":[117],"simulator.":[118],"results":[120],"indicate":[121],"high":[123],"value":[124],"10":[126,127],"extremely":[137],"low":[138],"SS":[139],"(1":[140],"mV/decade).":[141],"voltage":[143],"transfer":[144],"characteristics":[145],"dependence":[151],"on":[152],"levels":[154],"have":[155],"been":[156],"investigated.":[157],"Also,":[158],"compared":[166],"previous":[168],"counterparts.":[170]},"counts_by_year":[{"year":2025,"cited_by_count":2}],"updated_date":"2026-05-21T09:19:25.381259","created_date":"2025-10-10T00:00:00"}