{"id":"https://openalex.org/W206426551","doi":"https://doi.org/10.1023/a:1025130131636","title":"Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor","display_name":"Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor","publication_year":2003,"publication_date":"2003-09-16","ids":{"openalex":"https://openalex.org/W206426551","doi":"https://doi.org/10.1023/a:1025130131636","mag":"206426551"},"language":"en","primary_location":{"id":"doi:10.1023/a:1025130131636","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1025130131636","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076102072","display_name":"Maurizio Rebaudengo","orcid":"https://orcid.org/0000-0002-7135-7694"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Rebaudengo","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Sonza Reorda","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087219426","display_name":"M. Violante","orcid":"https://orcid.org/0000-0002-5821-3418"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Violante","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy. www.cad.polito.it#TAB#","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":0.7064,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.69330273,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"19","issue":"5","first_page":"577","last_page":"584"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8059223294258118},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6556568741798401},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6450751423835754},{"id":"https://openalex.org/keywords/pipeline-burst-cache","display_name":"Pipeline burst cache","score":0.5594914555549622},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5498464703559875},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5414465069770813},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47603514790534973},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4681589603424072},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4539886713027954},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4486463665962219},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4249922037124634},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.42316097021102905},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4221949577331543},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.31901758909225464},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.24210554361343384},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16182678937911987},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06588765978813171}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8059223294258118},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6556568741798401},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6450751423835754},{"id":"https://openalex.org/C157547923","wikidata":"https://www.wikidata.org/wiki/Q7197276","display_name":"Pipeline burst cache","level":5,"score":0.5594914555549622},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5498464703559875},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5414465069770813},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47603514790534973},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4681589603424072},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4539886713027954},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4486463665962219},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4249922037124634},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.42316097021102905},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4221949577331543},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.31901758909225464},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.24210554361343384},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16182678937911987},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06588765978813171},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1025130131636","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1025130131636","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W217021","https://openalex.org/W1527573830","https://openalex.org/W1541483005","https://openalex.org/W1908654170","https://openalex.org/W1985238821","https://openalex.org/W2125303664","https://openalex.org/W2148156265","https://openalex.org/W2150634791","https://openalex.org/W4236380341"],"related_works":["https://openalex.org/W1571368810","https://openalex.org/W146324612","https://openalex.org/W2065536872","https://openalex.org/W1579918296","https://openalex.org/W1506478314","https://openalex.org/W2379400621","https://openalex.org/W2088401441","https://openalex.org/W1764185321","https://openalex.org/W2091597269","https://openalex.org/W2124264444"],"abstract_inverted_index":null,"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-19T15:47:20.252518","created_date":"2016-06-24T00:00:00"}
