{"id":"https://openalex.org/W1504054971","doi":"https://doi.org/10.1023/a:1024556711058","title":"Restructuring Computations for Temporal Data Cache Locality","display_name":"Restructuring Computations for Temporal Data Cache Locality","publication_year":2003,"publication_date":"2003-08-01","ids":{"openalex":"https://openalex.org/W1504054971","doi":"https://doi.org/10.1023/a:1024556711058","mag":"1504054971"},"language":"en","primary_location":{"id":"doi:10.1023/a:1024556711058","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1024556711058","pdf_url":null,"source":{"id":"https://openalex.org/S148521650","display_name":"International Journal of Parallel Programming","issn_l":"0885-7458","issn":["0885-7458","1573-7640"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Parallel Programming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017757562","display_name":"Venkata K. Pingali","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Venkata K. Pingali","raw_affiliation_strings":["Information Sciences Institute, University of Southern California, Los Angeles, California, 90292","Information Sciences Institute University of Southern California  Los Angeles California"],"affiliations":[{"raw_affiliation_string":"Information Sciences Institute, University of Southern California, Los Angeles, California, 90292","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Information Sciences Institute University of Southern California  Los Angeles California","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022715353","display_name":"Sally A. McKee","orcid":"https://orcid.org/0000-0003-0514-3767"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sally A. McKee","raw_affiliation_strings":["Electrical and Computer Engineering, Cornell University, Ithaca, New York, 14853","[Electrical and computer engineering, Cornell University, Ithaca, New York]"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Cornell University, Ithaca, New York, 14853","institution_ids":["https://openalex.org/I205783295"]},{"raw_affiliation_string":"[Electrical and computer engineering, Cornell University, Ithaca, New York]","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002433369","display_name":"Wilson C. Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wilson C. Hsieh","raw_affiliation_strings":["School of Computing, University of Utah, 50S Central Campus Drive, Salt Lake City, Utah, 84112","School of Computing, 50S Central Campus Drive, Room 3190, University of Utah, Salt Lake City, Utah"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, 50S Central Campus Drive, Salt Lake City, Utah, 84112","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"School of Computing, 50S Central Campus Drive, Room 3190, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007283828","display_name":"John B. Carter","orcid":"https://orcid.org/0000-0002-1395-0254"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John B. Carter","raw_affiliation_strings":["School of Computing, University of Utah, 50S Central Campus Drive, Salt Lake City, Utah, 84112","School of Computing, 50S Central Campus Drive, Room 3190, University of Utah, Salt Lake City, Utah"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, 50S Central Campus Drive, Salt Lake City, Utah, 84112","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"School of Computing, 50S Central Campus Drive, Room 3190, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5017757562"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":{"value":2290,"currency":"EUR","value_usd":2890},"apc_paid":null,"fwci":2.0511,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.86752504,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"31","issue":"4","first_page":"305","last_page":"338"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11106","display_name":"Data Management and Algorithms","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8960261940956116},{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.8302194476127625},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7721681594848633},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.6491326093673706},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6350756883621216},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6302936673164368},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.5999057292938232},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5813021659851074},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5555946230888367},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5328313112258911},{"id":"https://openalex.org/keywords/locality-of-reference","display_name":"Locality of reference","score":0.5045527219772339},{"id":"https://openalex.org/keywords/theory-of-computation","display_name":"Theory of computation","score":0.5019702911376953},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.45235496759414673},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44257014989852905},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.43671518564224243},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.43479570746421814},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.4261716306209564},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.410255491733551},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3337000012397766},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.2610975503921509},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23681703209877014},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.15479928255081177},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.1528446078300476},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14548131823539734},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.10483986139297485},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.1024358868598938}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8960261940956116},{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.8302194476127625},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7721681594848633},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.6491326093673706},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6350756883621216},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6302936673164368},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.5999057292938232},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5813021659851074},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5555946230888367},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5328313112258911},{"id":"https://openalex.org/C27602214","wikidata":"https://www.wikidata.org/wiki/Q1868547","display_name":"Locality of reference","level":3,"score":0.5045527219772339},{"id":"https://openalex.org/C24858836","wikidata":"https://www.wikidata.org/wiki/Q844718","display_name":"Theory of computation","level":2,"score":0.5019702911376953},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.45235496759414673},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44257014989852905},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.43671518564224243},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.43479570746421814},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.4261716306209564},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.410255491733551},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3337000012397766},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.2610975503921509},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23681703209877014},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.15479928255081177},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.1528446078300476},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14548131823539734},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.10483986139297485},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.1024358868598938},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1024556711058","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1024556711058","pdf_url":null,"source":{"id":"https://openalex.org/S148521650","display_name":"International Journal of Parallel Programming","issn_l":"0885-7458","issn":["0885-7458","1573-7640"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Parallel Programming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W32456392","https://openalex.org/W87017217","https://openalex.org/W212786159","https://openalex.org/W1488421969","https://openalex.org/W1496148647","https://openalex.org/W1564883604","https://openalex.org/W1591568670","https://openalex.org/W1594896933","https://openalex.org/W1600053460","https://openalex.org/W1645807896","https://openalex.org/W1968347730","https://openalex.org/W1978780448","https://openalex.org/W1993464114","https://openalex.org/W2032732648","https://openalex.org/W2037018253","https://openalex.org/W2042629708","https://openalex.org/W2059696856","https://openalex.org/W2061291998","https://openalex.org/W2066155701","https://openalex.org/W2080422774","https://openalex.org/W2082856519","https://openalex.org/W2095679548","https://openalex.org/W2095875205","https://openalex.org/W2096070062","https://openalex.org/W2098130516","https://openalex.org/W2098220211","https://openalex.org/W2098815550","https://openalex.org/W2111069040","https://openalex.org/W2115667390","https://openalex.org/W2116730320","https://openalex.org/W2118269922","https://openalex.org/W2118735733","https://openalex.org/W2122234783","https://openalex.org/W2124711255","https://openalex.org/W2126601652","https://openalex.org/W2127881761","https://openalex.org/W2137077706","https://openalex.org/W2155917287","https://openalex.org/W2160404300","https://openalex.org/W2165971729","https://openalex.org/W2244841219","https://openalex.org/W2295099251","https://openalex.org/W2999265844","https://openalex.org/W4205806386","https://openalex.org/W4238138329","https://openalex.org/W4240533267","https://openalex.org/W4241668978","https://openalex.org/W4250941763","https://openalex.org/W4253068647","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1848192231","https://openalex.org/W2781952239","https://openalex.org/W2121698147","https://openalex.org/W4229493428","https://openalex.org/W2171195881","https://openalex.org/W2070949616","https://openalex.org/W2149344539","https://openalex.org/W2117533242","https://openalex.org/W1504054971","https://openalex.org/W2121921932"],"abstract_inverted_index":null,"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
