{"id":"https://openalex.org/W1596418796","doi":"https://doi.org/10.1023/a:1024485130001","title":"An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists","display_name":"An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists","publication_year":2003,"publication_date":"2003-07-01","ids":{"openalex":"https://openalex.org/W1596418796","doi":"https://doi.org/10.1023/a:1024485130001","mag":"1596418796"},"language":"en","primary_location":{"id":"doi:10.1023/a:1024485130001","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1024485130001","pdf_url":null,"source":{"id":"https://openalex.org/S3845260","display_name":"Formal Methods in System Design","issn_l":"0925-9856","issn":["0925-9856","1572-8102"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Formal Methods in System Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112156168","display_name":"Jason Baumgartner","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason Baumgartner","raw_affiliation_strings":["IBM Enterprise Systems Group, Austin, Texas, 78758, USA","IBM Enterprise Systems Group, Austin, Texas 78758, USA. jasonb@austin.ibm.com"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Enterprise Systems Group, Austin, Texas, 78758, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM Enterprise Systems Group, Austin, Texas 78758, USA. jasonb@austin.ibm.com","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007929969","display_name":"Tamir Heyman","orcid":null},"institutions":[{"id":"https://openalex.org/I4210167297","display_name":"IBM Research - Haifa","ror":"https://ror.org/05rw9t746","country_code":"IL","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210167297"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Tamir Heyman","raw_affiliation_strings":["IBM Haifa Research Laboratory, Haifa, Israel","IBM Haifa Research Laboratory, Haifa, Israel. tamirh@cs.technion.ac.il#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Haifa Research Laboratory, Haifa, Israel","institution_ids":["https://openalex.org/I4210167297"]},{"raw_affiliation_string":"IBM Haifa Research Laboratory, Haifa, Israel. tamirh@cs.technion.ac.il#TAB#","institution_ids":["https://openalex.org/I4210167297"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110255467","display_name":"Vigyan Singhal","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114883","display_name":"Tempus Labs (United States)","ror":"https://ror.org/01gbymr57","country_code":"US","type":"company","lineage":["https://openalex.org/I4210114883"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vigyan Singhal","raw_affiliation_strings":["Tempus Fugit, Inc., Fremont, California, 94538, USA","Tempus Fugit, Inc., Fremont, California 94538, USA. vigyan@tempusf.com#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tempus Fugit, Inc., Fremont, California, 94538, USA","institution_ids":[]},{"raw_affiliation_string":"Tempus Fugit, Inc., Fremont, California 94538, USA. vigyan@tempusf.com#TAB#","institution_ids":["https://openalex.org/I4210114883"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112689277","display_name":"Adnan Aziz","orcid":"https://orcid.org/0009-0003-5855-6861"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Adnan Aziz","raw_affiliation_strings":["The University of Texas, Austin, Texas, 78712, USA","The University of Texas, Austin, Texas 78712, USA. adnan@ece.utexas.edu#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas, Austin, Texas, 78712, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"The University of Texas, Austin, Texas 78712, USA. adnan@ece.utexas.edu#TAB#","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":3490,"currency":"USD","value_usd":3490},"apc_paid":null,"fwci":2.9072,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.9025859,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"23","issue":"1","first_page":"39","last_page":"65"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13295","display_name":"Safety Systems Engineering in Autonomy","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/2213","display_name":"Safety, Risk, Reliability and Quality"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.8671146035194397},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.775367021560669},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5918994545936584},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5762418508529663},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5072957873344421},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.50217604637146},{"id":"https://openalex.org/keywords/abstraction-model-checking","display_name":"Abstraction model checking","score":0.4803422689437866},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4361179769039154},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4267216622829437},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3997773230075836},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3855913281440735},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37585633993148804},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3716219961643219},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36746934056282043},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3491763472557068},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.305244117975235},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.14858373999595642}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.8671146035194397},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.775367021560669},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5918994545936584},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5762418508529663},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5072957873344421},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.50217604637146},{"id":"https://openalex.org/C30888246","wikidata":"https://www.wikidata.org/wiki/Q4669969","display_name":"Abstraction model checking","level":3,"score":0.4803422689437866},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4361179769039154},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4267216622829437},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3997773230075836},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3855913281440735},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37585633993148804},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3716219961643219},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36746934056282043},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3491763472557068},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.305244117975235},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.14858373999595642},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1024485130001","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1024485130001","pdf_url":null,"source":{"id":"https://openalex.org/S3845260","display_name":"Formal Methods in System Design","issn_l":"0925-9856","issn":["0925-9856","1572-8102"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Formal Methods in System Design","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W74463220","https://openalex.org/W258022877","https://openalex.org/W1503170978","https://openalex.org/W1503973138","https://openalex.org/W1520942064","https://openalex.org/W1543281322","https://openalex.org/W1585286906","https://openalex.org/W1600581889","https://openalex.org/W1662204117","https://openalex.org/W1955890204","https://openalex.org/W1990183105","https://openalex.org/W2001953066","https://openalex.org/W2004306067","https://openalex.org/W2006097283","https://openalex.org/W2009965218","https://openalex.org/W2029266474","https://openalex.org/W2087656024","https://openalex.org/W2090220859","https://openalex.org/W2117189826","https://openalex.org/W2117812659","https://openalex.org/W2135517247","https://openalex.org/W2141725526","https://openalex.org/W2148631003","https://openalex.org/W2149479807","https://openalex.org/W2162221882","https://openalex.org/W2172034979","https://openalex.org/W3123221209","https://openalex.org/W4235671167","https://openalex.org/W4285719527","https://openalex.org/W4300021588","https://openalex.org/W6681971441"],"related_works":["https://openalex.org/W2004826944","https://openalex.org/W1935030095","https://openalex.org/W2498204369","https://openalex.org/W2543290882","https://openalex.org/W2366672283","https://openalex.org/W2544421437","https://openalex.org/W1748531671","https://openalex.org/W1964556228","https://openalex.org/W2000778050","https://openalex.org/W2157874690"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2016-06-24T00:00:00"}
