{"id":"https://openalex.org/W2114317","doi":"https://doi.org/10.1023/a:1020367508848","title":"Compilation From Matlab to Process Networks Realized in FPGA","display_name":"Compilation From Matlab to Process Networks Realized in FPGA","publication_year":2002,"publication_date":"2002-11-01","ids":{"openalex":"https://openalex.org/W2114317","doi":"https://doi.org/10.1023/a:1020367508848","mag":"2114317"},"language":"en","primary_location":{"id":"doi:10.1023/a:1020367508848","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1020367508848","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008130646","display_name":"Tim Harriss","orcid":null},"institutions":[{"id":"https://openalex.org/I173869447","display_name":"Qinetiq (United Kingdom)","ror":"https://ror.org/02f60yb64","country_code":"GB","type":"company","lineage":["https://openalex.org/I173869447"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Tim Harriss","raw_affiliation_strings":["QinetiQ Ltd, Malvern, UK","QinetiQ Ltd,,,Malvern,,UK"],"affiliations":[{"raw_affiliation_string":"QinetiQ Ltd, Malvern, UK","institution_ids":["https://openalex.org/I173869447"]},{"raw_affiliation_string":"QinetiQ Ltd,,,Malvern,,UK","institution_ids":["https://openalex.org/I173869447"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002838991","display_name":"R. Walke","orcid":null},"institutions":[{"id":"https://openalex.org/I173869447","display_name":"Qinetiq (United Kingdom)","ror":"https://ror.org/02f60yb64","country_code":"GB","type":"company","lineage":["https://openalex.org/I173869447"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Richard Walke","raw_affiliation_strings":["QinetiQ Ltd, Malvern, UK","QinetiQ Ltd,,,Malvern,,UK"],"affiliations":[{"raw_affiliation_string":"QinetiQ Ltd, Malvern, UK","institution_ids":["https://openalex.org/I173869447"]},{"raw_affiliation_string":"QinetiQ Ltd,,,Malvern,,UK","institution_ids":["https://openalex.org/I173869447"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064339872","display_name":"Bart Kienhuis","orcid":null},"institutions":[{"id":"https://openalex.org/I121797337","display_name":"Leiden University","ror":"https://ror.org/027bh9e22","country_code":"NL","type":"education","lineage":["https://openalex.org/I121797337"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Bart Kienhuis","raw_affiliation_strings":["Leiden University (LIACS), Leiden, The Netherlands","Leiden University (LIACS), Leiden, The Netherlands#TAB#"],"affiliations":[{"raw_affiliation_string":"Leiden University (LIACS), Leiden, The Netherlands","institution_ids":["https://openalex.org/I121797337"]},{"raw_affiliation_string":"Leiden University (LIACS), Leiden, The Netherlands#TAB#","institution_ids":["https://openalex.org/I121797337"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108526301","display_name":"E. Deprettere","orcid":null},"institutions":[{"id":"https://openalex.org/I121797337","display_name":"Leiden University","ror":"https://ror.org/027bh9e22","country_code":"NL","type":"education","lineage":["https://openalex.org/I121797337"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Ed Deprettere","raw_affiliation_strings":["Leiden University (LIACS), Leiden, The Netherlands","Leiden University (LIACS), Leiden, The Netherlands#TAB#"],"affiliations":[{"raw_affiliation_string":"Leiden University (LIACS), Leiden, The Netherlands","institution_ids":["https://openalex.org/I121797337"]},{"raw_affiliation_string":"Leiden University (LIACS), Leiden, The Netherlands#TAB#","institution_ids":["https://openalex.org/I121797337"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5008130646"],"corresponding_institution_ids":["https://openalex.org/I173869447"],"apc_list":{"value":2490,"currency":"EUR","value_usd":3190},"apc_paid":null,"fwci":3.5448,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.93294145,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"7","issue":"4","first_page":"385","last_page":"403"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.897927463054657},{"id":"https://openalex.org/keywords/loop-unrolling","display_name":"Loop unrolling","score":0.7065933346748352},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.635706901550293},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5795997977256775},{"id":"https://openalex.org/keywords/parameterized-complexity","display_name":"Parameterized complexity","score":0.5548661947250366},{"id":"https://openalex.org/keywords/nested-loop-join","display_name":"Nested loop join","score":0.546939492225647},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5304861664772034},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5060774683952332},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.4733060896396637},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.437175989151001},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.413677453994751},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.38526150584220886},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3387351632118225},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.27279651165008545},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23985567688941956},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2200264036655426}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.897927463054657},{"id":"https://openalex.org/C76970557","wikidata":"https://www.wikidata.org/wiki/Q1869750","display_name":"Loop unrolling","level":3,"score":0.7065933346748352},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.635706901550293},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5795997977256775},{"id":"https://openalex.org/C165464430","wikidata":"https://www.wikidata.org/wiki/Q1570441","display_name":"Parameterized complexity","level":2,"score":0.5548661947250366},{"id":"https://openalex.org/C1306188","wikidata":"https://www.wikidata.org/wiki/Q4060687","display_name":"Nested loop join","level":2,"score":0.546939492225647},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5304861664772034},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5060774683952332},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.4733060896396637},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.437175989151001},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.413677453994751},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.38526150584220886},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3387351632118225},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27279651165008545},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23985567688941956},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2200264036655426},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1020367508848","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1020367508848","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W171918163","https://openalex.org/W1492631919","https://openalex.org/W1501488688","https://openalex.org/W1514472444","https://openalex.org/W1551441969","https://openalex.org/W1556393540","https://openalex.org/W1597755753","https://openalex.org/W1649645444","https://openalex.org/W2016421926","https://openalex.org/W2114067856","https://openalex.org/W2120030096","https://openalex.org/W2121817468","https://openalex.org/W2129183345","https://openalex.org/W2140837302","https://openalex.org/W2159414285","https://openalex.org/W2168148808","https://openalex.org/W4234937091","https://openalex.org/W4235816633"],"related_works":["https://openalex.org/W2014408922","https://openalex.org/W2154847378","https://openalex.org/W2119560736","https://openalex.org/W1556140123","https://openalex.org/W1563688358","https://openalex.org/W2103365632","https://openalex.org/W2292256608","https://openalex.org/W4251798485","https://openalex.org/W2122418911","https://openalex.org/W2083056254"],"abstract_inverted_index":null,"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}