{"id":"https://openalex.org/W2111761265","doi":"https://doi.org/10.1023/a:1012283800306","title":"Application of Deterministic Logic BIST on Industrial Circuits","display_name":"Application of Deterministic Logic BIST on Industrial Circuits","publication_year":2001,"publication_date":"2001-06-01","ids":{"openalex":"https://openalex.org/W2111761265","doi":"https://doi.org/10.1023/a:1012283800306","mag":"2111761265"},"language":"en","primary_location":{"id":"doi:10.1023/a:1012283800306","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1012283800306","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074916200","display_name":"Gundolf Kiefer","orcid":null},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Gundolf Kiefer","raw_affiliation_strings":["Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565, Stuttgart, Germany","Comput. Archit. Lab., Stuttgart Univ., Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565, Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Comput. Archit. Lab., Stuttgart Univ., Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062126489","display_name":"Harald Vranken","orcid":"https://orcid.org/0000-0003-4541-6475"},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]},{"id":"https://openalex.org/I1329325741","display_name":"Philips (Finland)","ror":"https://ror.org/01g4jev56","country_code":"FI","type":"company","lineage":["https://openalex.org/I1329325741","https://openalex.org/I4210122849"]},{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]},{"id":"https://openalex.org/I4210153656","display_name":"Holst Centre (Netherlands)","ror":"https://ror.org/04abpa862","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210153656"]}],"countries":["FI","NL"],"is_corresponding":false,"raw_author_name":"Harald Vranken","raw_affiliation_strings":["Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656, AA, Eindhoven, The Netherlands","Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands. Harald.Vranken@philips.com#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656, AA, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I109147379","https://openalex.org/I1329325741","https://openalex.org/I4210153656"]},{"raw_affiliation_string":"Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands. Harald.Vranken@philips.com#TAB#","institution_ids":["https://openalex.org/I109147379","https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044629739","display_name":"Erik Jan Marinissen","orcid":"https://orcid.org/0000-0002-5058-8303"},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]},{"id":"https://openalex.org/I1329325741","display_name":"Philips (Finland)","ror":"https://ror.org/01g4jev56","country_code":"FI","type":"company","lineage":["https://openalex.org/I1329325741","https://openalex.org/I4210122849"]},{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]},{"id":"https://openalex.org/I4210153656","display_name":"Holst Centre (Netherlands)","ror":"https://ror.org/04abpa862","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210153656"]}],"countries":["FI","NL"],"is_corresponding":false,"raw_author_name":"Erik Jan Marinissen","raw_affiliation_strings":["Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656, AA, Eindhoven, The Netherlands","Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, 5656, AA, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I109147379","https://openalex.org/I1329325741","https://openalex.org/I4210153656"]},{"raw_affiliation_string":"Philips Research Laboratories, IC Design\u2014Digital Design & Test, Prof. Holstlaan 4, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008775226","display_name":"Hans-Joachim Wunderlich","orcid":"https://orcid.org/0000-0003-4536-8290"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Hans-Joachim Wunderlich","raw_affiliation_strings":["Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565, Stuttgart, Germany","Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565 Stuttgart, Germany. wu@informatik.uni-stuttgart.de#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565, Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Computer Architecture Lab, University of Stuttgart, Breitwiesenstr. 20/22, 70565 Stuttgart, Germany. wu@informatik.uni-stuttgart.de#TAB#","institution_ids":["https://openalex.org/I100066346"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2990,"currency":"USD","value_usd":2990},"apc_paid":null,"fwci":13.6198,"has_fulltext":false,"cited_by_count":85,"citation_normalized_percentile":{"value":0.9871373,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"17","issue":"3-4","first_page":"351","last_page":"362"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6356410980224609},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5772079229354858},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5771344304084778},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5314580202102661},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48596179485321045},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.47415512800216675},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46218690276145935},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36345183849334717},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3560236692428589},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32964521646499634},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.20874366164207458},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13331061601638794},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.07817432284355164}],"concepts":[{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6356410980224609},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5772079229354858},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5771344304084778},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5314580202102661},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48596179485321045},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.47415512800216675},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46218690276145935},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36345183849334717},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3560236692428589},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32964521646499634},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.20874366164207458},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13331061601638794},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.07817432284355164},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1023/a:1012283800306","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1012283800306","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},{"id":"pmh:oai:informatik.uni-stuttgart.de:ART-2001-19","is_oa":false,"landing_page_url":"http://www2.informatik.uni-stuttgart.de/cgi-bin/NCSTRL/NCSTRL_view.pl?id=ART-2001-19&engl=1","pdf_url":null,"source":{"id":"https://openalex.org/S4306401306","display_name":"Fachbereich Informatik (University of Stuttgart)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I100066346","host_organization_name":"University of Stuttgart","host_organization_lineage":["https://openalex.org/I100066346"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"\\n In: Journal of Electronic Testing - Theory and Applications (JETTA).\\n Vol. 17(3), pp. 351-362\\n","raw_type":"Text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W154493537","https://openalex.org/W1515082873","https://openalex.org/W1581405316","https://openalex.org/W1862469596","https://openalex.org/W1905213452","https://openalex.org/W1984140831","https://openalex.org/W1989655566","https://openalex.org/W2026037646","https://openalex.org/W2081035247","https://openalex.org/W2097973512","https://openalex.org/W2099724478","https://openalex.org/W2100038543","https://openalex.org/W2104478015","https://openalex.org/W2105761964","https://openalex.org/W2111755940","https://openalex.org/W2112529780","https://openalex.org/W2122857933","https://openalex.org/W2124629389","https://openalex.org/W2126693329","https://openalex.org/W2136189083","https://openalex.org/W2137045371","https://openalex.org/W2137549092","https://openalex.org/W2142070135","https://openalex.org/W2152406824","https://openalex.org/W2156809456","https://openalex.org/W2161127763","https://openalex.org/W2162874773","https://openalex.org/W2167639389","https://openalex.org/W2170943189","https://openalex.org/W2336197036","https://openalex.org/W2503952136","https://openalex.org/W4230343699","https://openalex.org/W4246972245","https://openalex.org/W6670817577","https://openalex.org/W6675475057"],"related_works":["https://openalex.org/W2091833418","https://openalex.org/W2913077774","https://openalex.org/W4256030018","https://openalex.org/W2145089576","https://openalex.org/W2021253405","https://openalex.org/W1986228509","https://openalex.org/W2543176856","https://openalex.org/W2154529098","https://openalex.org/W2109319621","https://openalex.org/W776711554"],"abstract_inverted_index":null,"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2016-06-24T00:00:00"}