{"id":"https://openalex.org/W1537041622","doi":"https://doi.org/10.1023/a:1008397519162","title":"Design for Testability Techniques at the Behavioral and Register-Transfer Levels","display_name":"Design for Testability Techniques at the Behavioral and Register-Transfer Levels","publication_year":1998,"publication_date":"1998-10-01","ids":{"openalex":"https://openalex.org/W1537041622","doi":"https://doi.org/10.1023/a:1008397519162","mag":"1537041622"},"language":"en","primary_location":{"id":"doi:10.1023/a:1008397519162","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008397519162","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5105369696","display_name":"Sujit Dey","orcid":"https://orcid.org/0000-0001-9671-3950"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sujit Dey","raw_affiliation_strings":["Department of ECE, University of California, San Diego, La Jolla, CA, 92093","Department of ECE, University of California, San Diego, La Jolla, CA 92093. dey@ece.ucsd.edu#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of California, San Diego, La Jolla, CA, 92093","institution_ids":["https://openalex.org/I36258959"]},{"raw_affiliation_string":"Department of ECE, University of California, San Diego, La Jolla, CA 92093. dey@ece.ucsd.edu#TAB#","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["C&C Research Labs, NEC USA, Princeton, NJ, 08540","NEC USA, C&C Research Labs, Princeton, NJ 08540. anand@ccrl.nj.nec.com#TAB#"],"affiliations":[{"raw_affiliation_string":"C&C Research Labs, NEC USA, Princeton, NJ, 08540","institution_ids":[]},{"raw_affiliation_string":"NEC USA, C&C Research Labs, Princeton, NJ 08540. anand@ccrl.nj.nec.com#TAB#","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110108651","display_name":"K.D. Wagner","orcid":null},"institutions":[{"id":"https://openalex.org/I1325886976","display_name":"Siemens (Germany)","ror":"https://ror.org/059mq0909","country_code":"DE","type":"company","lineage":["https://openalex.org/I1325886976"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Kenneth D. Wagner","raw_affiliation_strings":["Siemens Microelectronics Inc, San Jose, CA","Siemens Microelectronics Inc. San Jose, CA. k.wagner@computer.org#TAB#"],"affiliations":[{"raw_affiliation_string":"Siemens Microelectronics Inc, San Jose, CA","institution_ids":[]},{"raw_affiliation_string":"Siemens Microelectronics Inc. San Jose, CA. k.wagner@computer.org#TAB#","institution_ids":["https://openalex.org/I1325886976"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5105369696"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.07290339,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"13","issue":"2","first_page":"79","last_page":"91"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.9084525108337402},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.7396045923233032},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.6942840218544006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5469862818717957},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5438001155853271},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5424661040306091},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5308120250701904},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5106704831123352},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.37215685844421387},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3507978916168213},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3484121561050415},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28674137592315674},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.15524011850357056}],"concepts":[{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.9084525108337402},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.7396045923233032},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.6942840218544006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5469862818717957},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5438001155853271},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5424661040306091},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5308120250701904},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5106704831123352},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.37215685844421387},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3507978916168213},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3484121561050415},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28674137592315674},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.15524011850357056},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1008397519162","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008397519162","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":70,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W1567363020","https://openalex.org/W1582825607","https://openalex.org/W1855007419","https://openalex.org/W1975803260","https://openalex.org/W1979324833","https://openalex.org/W2001251672","https://openalex.org/W2017169791","https://openalex.org/W2021799856","https://openalex.org/W2033237453","https://openalex.org/W2045122863","https://openalex.org/W2050977086","https://openalex.org/W2052900688","https://openalex.org/W2076273505","https://openalex.org/W2102054439","https://openalex.org/W2103538449","https://openalex.org/W2105607535","https://openalex.org/W2110404100","https://openalex.org/W2114391884","https://openalex.org/W2117922323","https://openalex.org/W2118560318","https://openalex.org/W2121668251","https://openalex.org/W2123721821","https://openalex.org/W2124083301","https://openalex.org/W2126762048","https://openalex.org/W2128271380","https://openalex.org/W2129317744","https://openalex.org/W2130601660","https://openalex.org/W2132086613","https://openalex.org/W2132903032","https://openalex.org/W2133269209","https://openalex.org/W2133745968","https://openalex.org/W2134415960","https://openalex.org/W2134626087","https://openalex.org/W2135129887","https://openalex.org/W2138862233","https://openalex.org/W2145559872","https://openalex.org/W2147197770","https://openalex.org/W2147402582","https://openalex.org/W2148444663","https://openalex.org/W2149020879","https://openalex.org/W2149145027","https://openalex.org/W2149374141","https://openalex.org/W2149406149","https://openalex.org/W2149787112","https://openalex.org/W2151419451","https://openalex.org/W2152077567","https://openalex.org/W2155118826","https://openalex.org/W2155341318","https://openalex.org/W2160753176","https://openalex.org/W2160963841","https://openalex.org/W2161515843","https://openalex.org/W2164906622","https://openalex.org/W2167149908","https://openalex.org/W2169762009","https://openalex.org/W2170235199","https://openalex.org/W2290100076","https://openalex.org/W2493328864","https://openalex.org/W2541102694","https://openalex.org/W3143014988","https://openalex.org/W3143912150","https://openalex.org/W3149957258","https://openalex.org/W4233770127","https://openalex.org/W4235989343","https://openalex.org/W4237650334","https://openalex.org/W4246313223","https://openalex.org/W4248054416","https://openalex.org/W4249241529","https://openalex.org/W4249956822","https://openalex.org/W6794063677"],"related_works":["https://openalex.org/W2947266479","https://openalex.org/W2107525390","https://openalex.org/W2091833418","https://openalex.org/W2157191248","https://openalex.org/W2151694129","https://openalex.org/W2913077774","https://openalex.org/W2369589212","https://openalex.org/W2543176856","https://openalex.org/W1579528621","https://openalex.org/W2141620082"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}