{"id":"https://openalex.org/W2126932061","doi":"https://doi.org/10.1023/a:1008326928340","title":"A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures","display_name":"A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures","publication_year":2000,"publication_date":"2000-06-01","ids":{"openalex":"https://openalex.org/W2126932061","doi":"https://doi.org/10.1023/a:1008326928340","mag":"2126932061"},"language":"en","primary_location":{"id":"doi:10.1023/a:1008326928340","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008326928340","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030177680","display_name":"Alfredo Benso","orcid":"https://orcid.org/0000-0003-3433-7739"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alfredo Benso","raw_affiliation_strings":["Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","[Dipt. di Autom. e Inf., Politecnico di Torino, Italy]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"[Dipt. di Autom. e Inf., Politecnico di Torino, Italy]","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112097043","display_name":"Silvia Cataldo","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Silvia Cataldo","raw_affiliation_strings":["Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. cataldo@polito.it#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. cataldo@polito.it#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091589252","display_name":"Silvia Chiusano","orcid":"https://orcid.org/0000-0002-5740-5004"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Silvia Chiusano","raw_affiliation_strings":["Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","Politecnico di Torino, Dip. Automatica e Informatica,  Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. chiusano@polito.it"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129, Torino TO, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica,  Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. chiusano@polito.it","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036258272","display_name":"P. Prinetto","orcid":"https://orcid.org/0000-0003-2400-8245"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Paolo Prinetto","raw_affiliation_strings":["Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy","Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. prinetto@polito.it#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Dip. Automatica e Informatica, Corso Duca degli Abruzzi 24, I-10129 Torino TO, Italy. prinetto@polito.it#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108606295","display_name":"Y. Zorian","orcid":null},"institutions":[{"id":"https://openalex.org/I204086833","display_name":"Cirrus Logic (United States)","ror":"https://ror.org/05t96az61","country_code":"US","type":"company","lineage":["https://openalex.org/I204086833"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yervant Zorian","raw_affiliation_strings":["Logic Vision, San Jose, CA, USA","Logic Vision, San Jose CA, USA. zorian@lvision.com#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Logic Vision, San Jose, CA, USA","institution_ids":["https://openalex.org/I204086833"]},{"raw_affiliation_string":"Logic Vision, San Jose CA, USA. zorian@lvision.com#TAB#","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":1.7997,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.8647541,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"16","issue":"3","first_page":"179","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6430962085723877},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.6230416297912598},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5472207069396973},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4685308337211609},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45504820346832275},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.44897618889808655},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.400572806596756},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3093844950199127},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12595391273498535}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6430962085723877},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.6230416297912598},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5472207069396973},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4685308337211609},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45504820346832275},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.44897618889808655},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.400572806596756},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3093844950199127},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12595391273498535},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1008326928340","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008326928340","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1529838256","https://openalex.org/W1985079157","https://openalex.org/W2099462896","https://openalex.org/W2132881562"],"related_works":["https://openalex.org/W2952348651","https://openalex.org/W2375742443","https://openalex.org/W2149381099","https://openalex.org/W2142462517","https://openalex.org/W4200520489","https://openalex.org/W1483190388","https://openalex.org/W2061536531","https://openalex.org/W193873054","https://openalex.org/W2317123011","https://openalex.org/W2153990583"],"abstract_inverted_index":null,"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-19T15:47:20.252518","created_date":"2016-06-24T00:00:00"}