{"id":"https://openalex.org/W27088708","doi":"https://doi.org/10.1023/a:1008310203790","title":"Built-in Self Test Based on Multiple On-Chip Signature Checking","display_name":"Built-in Self Test Based on Multiple On-Chip Signature Checking","publication_year":1999,"publication_date":"1999-06-01","ids":{"openalex":"https://openalex.org/W27088708","doi":"https://doi.org/10.1023/a:1008310203790","mag":"27088708"},"language":"en","primary_location":{"id":"doi:10.1023/a:1008310203790","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008310203790","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112253405","display_name":"Mohammed Fadle Abdulla","orcid":null},"institutions":[{"id":"https://openalex.org/I70374766","display_name":"University of Aden","ror":"https://ror.org/02w043707","country_code":"YE","type":"education","lineage":["https://openalex.org/I70374766"]}],"countries":["YE"],"is_corresponding":true,"raw_author_name":"Mohammed Fadle Abdulla","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Faculty of Engineering, University of Aden, Yemen","Department of Electrical and Electronic Engineering, Faculty of  Engineering, University of Aden, Yemen. mohammed_abdulla@hotmail.com"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Faculty of Engineering, University of Aden, Yemen","institution_ids":["https://openalex.org/I70374766"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Faculty of  Engineering, University of Aden, Yemen. mohammed_abdulla@hotmail.com","institution_ids":["https://openalex.org/I70374766"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036733255","display_name":"C.P. Ravikumar","orcid":"https://orcid.org/0000-0003-0809-5545"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"C.P. Ravikumar","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology, New Delhi, 110016, India","Department of Electrical Engineering, Indian Institute of Technology,  New Delhi, 110016, India. rkumar@ee.iitd.ernet.in"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology, New Delhi, 110016, India","institution_ids":["https://openalex.org/I68891433"]},{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology,  New Delhi, 110016, India. rkumar@ee.iitd.ernet.in","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101478917","display_name":"Anshul Kumar","orcid":"https://orcid.org/0000-0002-3871-5402"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anshul Kumar","raw_affiliation_strings":["Department of Computer Science & Engineering, Indian Institute of Technology, New Delhi, 110016, India","Department of Computer Science & Engineering, Indian Institute of Technology, New Delhi, 110016, India. anshul@cse.iitd.ernet.in#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, Indian Institute of Technology, New Delhi, 110016, India","institution_ids":["https://openalex.org/I68891433"]},{"raw_affiliation_string":"Department of Computer Science & Engineering, Indian Institute of Technology, New Delhi, 110016, India. anshul@cse.iitd.ernet.in#TAB#","institution_ids":["https://openalex.org/I64295750"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5112253405"],"corresponding_institution_ids":["https://openalex.org/I70374766"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.00420272,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":"3","first_page":"227","last_page":"244"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6834980845451355},{"id":"https://openalex.org/keywords/aliasing","display_name":"Aliasing","score":0.6585577130317688},{"id":"https://openalex.org/keywords/signature","display_name":"Signature (topology)","score":0.6405205726623535},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6333889961242676},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6010375022888184},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5023167133331299},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4986097812652588},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4780343472957611},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4734109342098236},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3666384816169739},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33405208587646484},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.08295941352844238},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0788176953792572}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6834980845451355},{"id":"https://openalex.org/C4069607","wikidata":"https://www.wikidata.org/wiki/Q868732","display_name":"Aliasing","level":3,"score":0.6585577130317688},{"id":"https://openalex.org/C2779696439","wikidata":"https://www.wikidata.org/wiki/Q7512811","display_name":"Signature (topology)","level":2,"score":0.6405205726623535},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6333889961242676},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6010375022888184},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5023167133331299},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4986097812652588},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4780343472957611},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4734109342098236},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3666384816169739},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33405208587646484},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.08295941352844238},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0788176953792572},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1008310203790","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1008310203790","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W42070592","https://openalex.org/W124688537","https://openalex.org/W628287923","https://openalex.org/W1554885925","https://openalex.org/W1867275958","https://openalex.org/W2011068638","https://openalex.org/W2018597830","https://openalex.org/W2033155169","https://openalex.org/W2034476614","https://openalex.org/W2044076967","https://openalex.org/W2105096043","https://openalex.org/W2109678242","https://openalex.org/W2111089645","https://openalex.org/W2141495218","https://openalex.org/W2146738326","https://openalex.org/W2149745742","https://openalex.org/W2149787112","https://openalex.org/W2152279620","https://openalex.org/W2293775605","https://openalex.org/W3151860154","https://openalex.org/W6601674458"],"related_works":["https://openalex.org/W2134098352","https://openalex.org/W2133453507","https://openalex.org/W2098279887","https://openalex.org/W2142592902","https://openalex.org/W2122966530","https://openalex.org/W1593809099","https://openalex.org/W2033960698","https://openalex.org/W2101328413","https://openalex.org/W2535563940","https://openalex.org/W2115073733"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}