{"id":"https://openalex.org/W2171750993","doi":"https://doi.org/10.1023/a:1007956226232","title":"Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors","display_name":"Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors","publication_year":1997,"publication_date":"1997-03-01","ids":{"openalex":"https://openalex.org/W2171750993","doi":"https://doi.org/10.1023/a:1007956226232","mag":"2171750993"},"language":"en","primary_location":{"id":"doi:10.1023/a:1007956226232","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1007956226232","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027970792","display_name":"Sharath Sriram","orcid":"https://orcid.org/0000-0002-8365-7504"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Sriram","raw_affiliation_strings":["Department of Electrical Engineering and Computer Sciences, University of California, Cory Hall, Berkeley, CA, 94720"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Sciences, University of California, Cory Hall, Berkeley, CA, 94720","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009831760","display_name":"Edward A. Lee","orcid":"https://orcid.org/0000-0002-5663-0584"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edward A. Lee","raw_affiliation_strings":["Department of Electrical Engineering and Computer Sciences, University of California, Cory Hall, Berkeley, CA, 94720"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Sciences, University of California, Cory Hall, Berkeley, CA, 94720","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.20361876,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"15","issue":"3","first_page":"207","last_page":"220"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.886685848236084},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.7527133226394653},{"id":"https://openalex.org/keywords/compile-time","display_name":"Compile time","score":0.7224266529083252},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6041380167007446},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5671601891517639},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5651865005493164},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.563279390335083},{"id":"https://openalex.org/keywords/execution-time","display_name":"Execution time","score":0.5124021172523499},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.50426185131073},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4502059519290924},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.4293830990791321},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4282434582710266},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11689084768295288}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.886685848236084},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.7527133226394653},{"id":"https://openalex.org/C200833197","wikidata":"https://www.wikidata.org/wiki/Q333707","display_name":"Compile time","level":3,"score":0.7224266529083252},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6041380167007446},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5671601891517639},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5651865005493164},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.563279390335083},{"id":"https://openalex.org/C2989134064","wikidata":"https://www.wikidata.org/wiki/Q288510","display_name":"Execution time","level":2,"score":0.5124021172523499},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.50426185131073},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4502059519290924},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.4293830990791321},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4282434582710266},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11689084768295288},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1023/a:1007956226232","is_oa":false,"landing_page_url":"https://doi.org/10.1023/a:1007956226232","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.6399999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W76448128","https://openalex.org/W1490807715","https://openalex.org/W1496267491","https://openalex.org/W1537151756","https://openalex.org/W2008321029","https://openalex.org/W2011784906","https://openalex.org/W2027077493","https://openalex.org/W2049454663","https://openalex.org/W2074349000","https://openalex.org/W2079963453","https://openalex.org/W2099736035","https://openalex.org/W2113487338","https://openalex.org/W2117019286","https://openalex.org/W2120431055","https://openalex.org/W2125690626","https://openalex.org/W2129183345","https://openalex.org/W2138711634","https://openalex.org/W2139378242","https://openalex.org/W2141628696","https://openalex.org/W2156172744","https://openalex.org/W2157758640","https://openalex.org/W2168850728","https://openalex.org/W2171247893","https://openalex.org/W2296760900","https://openalex.org/W2752885492","https://openalex.org/W4232919122"],"related_works":["https://openalex.org/W2164604526","https://openalex.org/W1985964844","https://openalex.org/W2019189970","https://openalex.org/W2018720121","https://openalex.org/W2119121861","https://openalex.org/W2032571270","https://openalex.org/W1931376724","https://openalex.org/W2904270635","https://openalex.org/W4230586735","https://openalex.org/W3186146083"],"abstract_inverted_index":null,"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":4}],"updated_date":"2026-06-19T15:47:20.252518","created_date":"2016-06-24T00:00:00"}