{"id":"https://openalex.org/W7128294966","doi":"https://doi.org/10.1016/j.vlsi.2026.102679","title":"FCMFID: A Full Coverage Multi-bit Fault-Tolerant Instruction Decoder for RISC-V based softcore","display_name":"FCMFID: A Full Coverage Multi-bit Fault-Tolerant Instruction Decoder for RISC-V based softcore","publication_year":2026,"publication_date":"2026-02-07","ids":{"openalex":"https://openalex.org/W7128294966","doi":"https://doi.org/10.1016/j.vlsi.2026.102679"},"language":"en","primary_location":{"id":"doi:10.1016/j.vlsi.2026.102679","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.vlsi.2026.102679","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5125339392","display_name":"Sujeet Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I132153292","display_name":"Indian Institute of Technology Patna","ror":"https://ror.org/01ft5vz71","country_code":"IN","type":"education","lineage":["https://openalex.org/I132153292"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sujeet Kumar","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Patna, Bihar, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Patna, Bihar, India","institution_ids":["https://openalex.org/I132153292"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015170706","display_name":"Kailash Chandra Ray","orcid":"https://orcid.org/0000-0002-7345-1377"},"institutions":[{"id":"https://openalex.org/I132153292","display_name":"Indian Institute of Technology Patna","ror":"https://ror.org/01ft5vz71","country_code":"IN","type":"education","lineage":["https://openalex.org/I132153292"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kailash Chandra Ray","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Patna, Bihar, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Patna, Bihar, India","institution_ids":["https://openalex.org/I132153292"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5125339392"],"corresponding_institution_ids":["https://openalex.org/I132153292"],"apc_list":{"value":2150,"currency":"USD","value_usd":2150},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.45970173,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"108","issue":null,"first_page":"102679","last_page":"102679"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9629999995231628,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9629999995231628,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.011900000274181366,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.0044999998062849045,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6338000297546387},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.6014999747276306},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5115000009536743},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.49810001254081726},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.4562000036239624},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.4262999892234802},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.41519999504089355},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4090999960899353},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.4004000127315521}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7549999952316284},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6850000023841858},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6338000297546387},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.6014999747276306},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5115000009536743},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.49810001254081726},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.4562000036239624},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.4262999892234802},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.41519999504089355},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4090999960899353},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.4004000127315521},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.3894999921321869},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.36309999227523804},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.3587000072002411},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3555999994277954},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.35100001096725464},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.3296000063419342},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.32120001316070557},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.31859999895095825},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.3100999891757965},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.3041999936103821},{"id":"https://openalex.org/C131521367","wikidata":"https://www.wikidata.org/wiki/Q625502","display_name":"Parity bit","level":2,"score":0.30059999227523804},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.29010000824928284},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.2897000014781952},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.28690001368522644},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.28119999170303345},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.27810001373291016},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.2734000086784363},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.2632000148296356},{"id":"https://openalex.org/C73150493","wikidata":"https://www.wikidata.org/wiki/Q853922","display_name":"Hamming code","level":4,"score":0.2533999979496002}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.vlsi.2026.102679","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.vlsi.2026.102679","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2027452915","https://openalex.org/W2033816298","https://openalex.org/W2083621035","https://openalex.org/W2099760530","https://openalex.org/W2158074071","https://openalex.org/W2559705978","https://openalex.org/W2560546464","https://openalex.org/W2589986623","https://openalex.org/W2744495028","https://openalex.org/W2753954328","https://openalex.org/W2904417098","https://openalex.org/W2966099395","https://openalex.org/W2971478958","https://openalex.org/W2971655256","https://openalex.org/W3082143909","https://openalex.org/W3146456515","https://openalex.org/W4386951712","https://openalex.org/W4405485531","https://openalex.org/W4408155613","https://openalex.org/W4413031638","https://openalex.org/W4416113878","https://openalex.org/W7105295578"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-02-09T05:59:30.833894","created_date":"2026-02-08T00:00:00"}