{"id":"https://openalex.org/W1977174063","doi":"https://doi.org/10.1016/s1383-7621(98)00048-4","title":"DataScalar: A memory-centric approach to computing","display_name":"DataScalar: A memory-centric approach to computing","publication_year":1999,"publication_date":"1999-06-01","ids":{"openalex":"https://openalex.org/W1977174063","doi":"https://doi.org/10.1016/s1383-7621(98)00048-4","mag":"1977174063"},"language":"en","primary_location":{"id":"doi:10.1016/s1383-7621(98)00048-4","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s1383-7621(98)00048-4","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020214726","display_name":"Stefanos Kaxiras","orcid":"https://orcid.org/0000-0001-8267-0232"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Stefanos Kaxiras","raw_affiliation_strings":["University of Wisconsin-Madison, Computer Sciences, 1210 W. Dayton St., Madison, WI 53705, USA"],"affiliations":[{"raw_affiliation_string":"University of Wisconsin-Madison, Computer Sciences, 1210 W. Dayton St., Madison, WI 53705, USA","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067337700","display_name":"Doug Burger","orcid":"https://orcid.org/0009-0006-6588-6596"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Doug Burger","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5045675806","display_name":"James Goodman","orcid":"https://orcid.org/0000-0003-3211-3416"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"James R. Goodman","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5020214726"],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":{"value":2800,"currency":"USD","value_usd":2800},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.10704574,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"45","issue":"12-13","first_page":"1001","last_page":"1022"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9102071523666382},{"id":"https://openalex.org/keywords/uniprocessor-system","display_name":"Uniprocessor system","score":0.8834819793701172},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.7983572483062744},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6036628484725952},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.4862140715122223},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.46483302116394043},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.46262454986572266},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4583839774131775},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4348224401473999},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.3654310405254364},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3562473952770233},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3408339321613312},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.33116769790649414},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23388662934303284},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.14455178380012512},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1038181483745575}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9102071523666382},{"id":"https://openalex.org/C79189994","wikidata":"https://www.wikidata.org/wiki/Q3488021","display_name":"Uniprocessor system","level":3,"score":0.8834819793701172},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.7983572483062744},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6036628484725952},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.4862140715122223},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.46483302116394043},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.46262454986572266},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4583839774131775},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4348224401473999},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.3654310405254364},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3562473952770233},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3408339321613312},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.33116769790649414},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23388662934303284},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.14455178380012512},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1038181483745575},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s1383-7621(98)00048-4","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s1383-7621(98)00048-4","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320308380","display_name":"Yale University","ror":"https://ror.org/03v76x132"},{"id":"https://openalex.org/F4320330142","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W70437322","https://openalex.org/W152254645","https://openalex.org/W1480912904","https://openalex.org/W1569032152","https://openalex.org/W1599150801","https://openalex.org/W1969243435","https://openalex.org/W2018761720","https://openalex.org/W2099958604","https://openalex.org/W2100913437","https://openalex.org/W2103330947","https://openalex.org/W2119410522","https://openalex.org/W2120734674","https://openalex.org/W2127609451","https://openalex.org/W2136348740","https://openalex.org/W2157381427","https://openalex.org/W2161578546","https://openalex.org/W2163820265","https://openalex.org/W2168300787","https://openalex.org/W2168863325","https://openalex.org/W2169928889","https://openalex.org/W2170585292","https://openalex.org/W2179730127","https://openalex.org/W2293008608","https://openalex.org/W2295099251","https://openalex.org/W2296006986","https://openalex.org/W4230119368","https://openalex.org/W4231346589","https://openalex.org/W4242081832","https://openalex.org/W4255238016"],"related_works":["https://openalex.org/W254684032","https://openalex.org/W1848192231","https://openalex.org/W4230333905","https://openalex.org/W2146271867","https://openalex.org/W1495085183","https://openalex.org/W2339366892","https://openalex.org/W3151393245","https://openalex.org/W2550767633","https://openalex.org/W1797968800","https://openalex.org/W2247651031"],"abstract_inverted_index":null,"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}