{"id":"https://openalex.org/W2022882335","doi":"https://doi.org/10.1016/s1383-7621(00)00024-2","title":"On the derivation of a correct deadlock free communication kernel for loop connected message passing architecture from its user's specification","display_name":"On the derivation of a correct deadlock free communication kernel for loop connected message passing architecture from its user's specification","publication_year":2000,"publication_date":"2000-11-01","ids":{"openalex":"https://openalex.org/W2022882335","doi":"https://doi.org/10.1016/s1383-7621(00)00024-2","mag":"2022882335"},"language":"en","primary_location":{"id":"doi:10.1016/s1383-7621(00)00024-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s1383-7621(00)00024-2","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089923787","display_name":"Anup Bandyopadhyay","orcid":"https://orcid.org/0000-0001-6215-8530"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"A.K Bandyopadhyay","raw_affiliation_strings":["Department of Electronics and Telecommunication Engineering, Jadavpur University, Calcutta 700032, India","Department of Electronics & Telecommunication Engineering , Jadavpur University , Calcutta, 700032, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication Engineering, Jadavpur University, Calcutta 700032, India","institution_ids":["https://openalex.org/I170979836"]},{"raw_affiliation_string":"Department of Electronics & Telecommunication Engineering , Jadavpur University , Calcutta, 700032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021592859","display_name":"J Bandyopadhyay","orcid":null},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"J Bandyopadhyay","raw_affiliation_strings":["Staff Qtr., Qtr.No. F/6, Jadavpur University Campus, Calcutta 700032, India"],"affiliations":[{"raw_affiliation_string":"Staff Qtr., Qtr.No. F/6, Jadavpur University Campus, Calcutta 700032, India","institution_ids":["https://openalex.org/I170979836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5089923787"],"corresponding_institution_ids":["https://openalex.org/I170979836"],"apc_list":{"value":2800,"currency":"USD","value_usd":2800},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.12719704,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"46","issue":"13","first_page":"1257","last_page":"1261"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8976377248764038},{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.7772135138511658},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5692704916000366},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5628700256347656},{"id":"https://openalex.org/keywords/message-passing","display_name":"Message passing","score":0.562289834022522},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5446618795394897},{"id":"https://openalex.org/keywords/message-broker","display_name":"Message broker","score":0.5313100814819336},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5290224552154541},{"id":"https://openalex.org/keywords/dijkstras-algorithm","display_name":"Dijkstra's algorithm","score":0.5196046233177185},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3828217089176178},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3824375867843628},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.12383857369422913},{"id":"https://openalex.org/keywords/shortest-path-problem","display_name":"Shortest path problem","score":0.12297096848487854},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.07174539566040039}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8976377248764038},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.7772135138511658},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5692704916000366},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5628700256347656},{"id":"https://openalex.org/C854659","wikidata":"https://www.wikidata.org/wiki/Q1859284","display_name":"Message passing","level":2,"score":0.562289834022522},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5446618795394897},{"id":"https://openalex.org/C179733262","wikidata":"https://www.wikidata.org/wiki/Q6821765","display_name":"Message broker","level":2,"score":0.5313100814819336},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5290224552154541},{"id":"https://openalex.org/C173870130","wikidata":"https://www.wikidata.org/wiki/Q8548","display_name":"Dijkstra's algorithm","level":4,"score":0.5196046233177185},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3828217089176178},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3824375867843628},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.12383857369422913},{"id":"https://openalex.org/C22590252","wikidata":"https://www.wikidata.org/wiki/Q1058754","display_name":"Shortest path problem","level":3,"score":0.12297096848487854},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.07174539566040039},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s1383-7621(00)00024-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s1383-7621(00)00024-2","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1993234270","https://openalex.org/W2054414072","https://openalex.org/W2065501971","https://openalex.org/W2090687903","https://openalex.org/W2103953153"],"related_works":["https://openalex.org/W2510374584","https://openalex.org/W1556686321","https://openalex.org/W2390507337","https://openalex.org/W4288966080","https://openalex.org/W2392091800","https://openalex.org/W2026181001","https://openalex.org/W2276177954","https://openalex.org/W4226144855","https://openalex.org/W2135269885","https://openalex.org/W2361929291"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}