{"id":"https://openalex.org/W1974688537","doi":"https://doi.org/10.1016/s0167-739x(00)00075-3","title":"Modeling and improving locality for the sparse-matrix\u2013vector product on cache memories","display_name":"Modeling and improving locality for the sparse-matrix\u2013vector product on cache memories","publication_year":2001,"publication_date":"2001-09-01","ids":{"openalex":"https://openalex.org/W1974688537","doi":"https://doi.org/10.1016/s0167-739x(00)00075-3","mag":"1974688537"},"language":"en","primary_location":{"id":"doi:10.1016/s0167-739x(00)00075-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0167-739x(00)00075-3","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018628722","display_name":"Dora B. Heras","orcid":"https://orcid.org/0000-0002-5304-1426"},"institutions":[{"id":"https://openalex.org/I200284239","display_name":"Universidade de Santiago de Compostela","ror":"https://ror.org/030eybx10","country_code":"ES","type":"education","lineage":["https://openalex.org/I200284239"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"D.B. Heras","raw_affiliation_strings":["Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain","institution_ids":["https://openalex.org/I200284239"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102992099","display_name":"Vicente Blanco","orcid":"https://orcid.org/0000-0003-1166-6310"},"institutions":[{"id":"https://openalex.org/I200284239","display_name":"Universidade de Santiago de Compostela","ror":"https://ror.org/030eybx10","country_code":"ES","type":"education","lineage":["https://openalex.org/I200284239"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"V. Blanco","raw_affiliation_strings":["Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain","institution_ids":["https://openalex.org/I200284239"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085436368","display_name":"Jos\u00e9 C. Cabaleiro","orcid":"https://orcid.org/0000-0002-5674-5162"},"institutions":[{"id":"https://openalex.org/I200284239","display_name":"Universidade de Santiago de Compostela","ror":"https://ror.org/030eybx10","country_code":"ES","type":"education","lineage":["https://openalex.org/I200284239"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J.C. Cabaleiro","raw_affiliation_strings":["Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain","institution_ids":["https://openalex.org/I200284239"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006709169","display_name":"Francisco F. Rivera","orcid":"https://orcid.org/0000-0002-6728-9350"},"institutions":[{"id":"https://openalex.org/I200284239","display_name":"Universidade de Santiago de Compostela","ror":"https://ror.org/030eybx10","country_code":"ES","type":"education","lineage":["https://openalex.org/I200284239"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F.F. Rivera","raw_affiliation_strings":["Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Electr\u00f3nica y Computaci\u00f3n, Univ. Santiago de Compostela, 15706 Santiago de Compostela, Spain","institution_ids":["https://openalex.org/I200284239"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5018628722"],"corresponding_institution_ids":["https://openalex.org/I200284239"],"apc_list":{"value":3340,"currency":"USD","value_usd":3340},"apc_paid":null,"fwci":2.4431,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.88876014,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"18","issue":"1","first_page":"55","last_page":"67"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10792","display_name":"Matrix Theory and Algorithms","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8947794437408447},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.8201104402542114},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.66066575050354},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6107428073883057},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.45083677768707275},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.4101818799972534},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.35558605194091797}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8947794437408447},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.8201104402542114},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.66066575050354},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6107428073883057},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.45083677768707275},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.4101818799972534},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.35558605194091797},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0167-739x(00)00075-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0167-739x(00)00075-3","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4399999976158142,"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320326655","display_name":"Xunta de Galicia","ror":"https://ror.org/0181xnw06"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W111684325","https://openalex.org/W398579329","https://openalex.org/W1506342804","https://openalex.org/W1513741151","https://openalex.org/W1555915743","https://openalex.org/W1574303240","https://openalex.org/W1575701986","https://openalex.org/W1717440967","https://openalex.org/W1768849904","https://openalex.org/W1971514468","https://openalex.org/W2014033064","https://openalex.org/W2048914028","https://openalex.org/W2059262299","https://openalex.org/W2068863300","https://openalex.org/W2089739574","https://openalex.org/W2119609467","https://openalex.org/W2128317922","https://openalex.org/W2138521161","https://openalex.org/W2164139896","https://openalex.org/W2167013139","https://openalex.org/W2320308421","https://openalex.org/W2503150106","https://openalex.org/W3142300350","https://openalex.org/W4237220528"],"related_works":["https://openalex.org/W2147122795","https://openalex.org/W2061075966","https://openalex.org/W3147501184","https://openalex.org/W2046128376","https://openalex.org/W2109715593","https://openalex.org/W3161817247","https://openalex.org/W2167303720","https://openalex.org/W1918294866","https://openalex.org/W2012518269","https://openalex.org/W2401390283"],"abstract_inverted_index":null,"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}