{"id":"https://openalex.org/W2040310954","doi":"https://doi.org/10.1016/s0141-9331(96)90007-1","title":"Reduced DRAM cycle times with extended data-out","display_name":"Reduced DRAM cycle times with extended data-out","publication_year":1996,"publication_date":"1996-04-01","ids":{"openalex":"https://openalex.org/W2040310954","doi":"https://doi.org/10.1016/s0141-9331(96)90007-1","mag":"2040310954"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(96)90007-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(96)90007-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5098287865","display_name":"Micron Europe Ltd","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Micron Europe Ltd","raw_affiliation_strings":["Micron House, Wellington Business Park, Dukes Ride, Crowthorne, Berks RG45 6LS, UK"],"affiliations":[{"raw_affiliation_string":"Micron House, Wellington Business Park, Dukes Ride, Crowthorne, Berks RG45 6LS, UK","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5098287865"],"corresponding_institution_ids":[],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14599451,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"2","first_page":"125","last_page":"131"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9749000072479248,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9749000072479248,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9749000072479248,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9745000004768372,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.968598484992981},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.813886284828186},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.4611831307411194},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.42752158641815186},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35561448335647583},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35186830163002014},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35110199451446533},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2520369291305542},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.07191327214241028}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.968598484992981},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.813886284828186},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4611831307411194},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.42752158641815186},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35561448335647583},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35186830163002014},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35110199451446533},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2520369291305542},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.07191327214241028},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0141-9331(96)90007-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(96)90007-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4293430534","https://openalex.org/W2342813629","https://openalex.org/W3150934690","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W1976244802","https://openalex.org/W2083934844","https://openalex.org/W1992487929","https://openalex.org/W4386903460"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-01-13T01:12:25.745995","created_date":"2025-10-10T00:00:00"}