{"id":"https://openalex.org/W2019755866","doi":"https://doi.org/10.1016/s0141-9331(96)01122-2","title":"Design and implementation of dual processor block with shared external cache memory","display_name":"Design and implementation of dual processor block with shared external cache memory","publication_year":1997,"publication_date":"1997-07-01","ids":{"openalex":"https://openalex.org/W2019755866","doi":"https://doi.org/10.1016/s0141-9331(96)01122-2","mag":"2019755866"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(96)01122-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(96)01122-2","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113812729","display_name":"Soo-Won Kim","orcid":"https://orcid.org/0000-0002-6781-3925"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Soo-Won Kim","raw_affiliation_strings":["Electronics Engineering Department, Korea University, Anam-dong 1-ga, Seongbuk-ku, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, Korea University, Anam-dong 1-ga, Seongbuk-ku, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026204977","display_name":"Hanseok Ko","orcid":"https://orcid.org/0000-0002-8744-4514"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hanseok Ko","raw_affiliation_strings":["Electronics Engineering Department, Korea University, Anam-dong 1-ga, Seongbuk-ku, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, Korea University, Anam-dong 1-ga, Seongbuk-ku, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111950842","display_name":"Woo-Jong Hahn","orcid":null},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woo-Jong Hahn","raw_affiliation_strings":["Electronics and Telecommunications Research Institute, Processor Section, P.B. 106, Yusong, Taejon 306-600, South Korea"],"affiliations":[{"raw_affiliation_string":"Electronics and Telecommunications Research Institute, Processor Section, P.B. 106, Yusong, Taejon 306-600, South Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076174914","display_name":"Jong-Sik Hahm","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jong-Sik Hahm","raw_affiliation_strings":["Unique Technology, Yuuron Offistel (#1106), Sentiwa-dong 79-14, Chung-ku, Taejon, South Korea"],"affiliations":[{"raw_affiliation_string":"Unique Technology, Yuuron Offistel (#1106), Sentiwa-dong 79-14, Chung-ku, Taejon, South Korea","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5113812729"],"corresponding_institution_ids":["https://openalex.org/I197347611"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12513089,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"10","first_page":"595","last_page":"605"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8811402916908264},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.6525076627731323},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.6193174719810486},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5931589603424072},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5918335914611816},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.5306310653686523},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.49181559681892395},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4686657190322876},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4403938055038452},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.43824511766433716},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.4378221035003662},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.43197518587112427},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.4233444333076477},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.4175732135772705},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.37181708216667175}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8811402916908264},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.6525076627731323},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.6193174719810486},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5931589603424072},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5918335914611816},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.5306310653686523},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.49181559681892395},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4686657190322876},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4403938055038452},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.43824511766433716},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.4378221035003662},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.43197518587112427},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.4233444333076477},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.4175732135772705},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.37181708216667175}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0141-9331(96)01122-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(96)01122-2","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1584049700","https://openalex.org/W2056971515","https://openalex.org/W2096329363","https://openalex.org/W2100893446","https://openalex.org/W2106193445","https://openalex.org/W2106626405","https://openalex.org/W2114958150","https://openalex.org/W2134385063","https://openalex.org/W2146296339","https://openalex.org/W2147620657","https://openalex.org/W2147638342","https://openalex.org/W2153287020","https://openalex.org/W2215787497","https://openalex.org/W2218951775","https://openalex.org/W2294693415","https://openalex.org/W2496363571","https://openalex.org/W4234073335","https://openalex.org/W4237335835","https://openalex.org/W4239302855","https://openalex.org/W4248505840","https://openalex.org/W6601975672","https://openalex.org/W6610250247"],"related_works":["https://openalex.org/W2091637093","https://openalex.org/W2148887883","https://openalex.org/W4238157485","https://openalex.org/W2407815036","https://openalex.org/W2243652835","https://openalex.org/W4243971234","https://openalex.org/W142027738","https://openalex.org/W2088147613","https://openalex.org/W2326675668","https://openalex.org/W2394669314"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}