{"id":"https://openalex.org/W2050479731","doi":"https://doi.org/10.1016/s0141-9331(09)91003-1","title":"A development environment for rapid prototyping of user applications on distributed memory multiprocessor systems","display_name":"A development environment for rapid prototyping of user applications on distributed memory multiprocessor systems","publication_year":1993,"publication_date":"1993-11-01","ids":{"openalex":"https://openalex.org/W2050479731","doi":"https://doi.org/10.1016/s0141-9331(09)91003-1","mag":"2050479731"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(09)91003-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(09)91003-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102118271","display_name":"PK Das","orcid":null},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"PK Das","raw_affiliation_strings":["Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025246386","display_name":"B. Nag","orcid":null},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"B Nag","raw_affiliation_strings":["Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074685765","display_name":"Pratyusha Das","orcid":"https://orcid.org/0000-0002-0398-2949"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P Das","raw_affiliation_strings":["Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, PO Box 17004, Jadavpur University, Calcutta, 700032, India","institution_ids":["https://openalex.org/I170979836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102118271"],"corresponding_institution_ids":["https://openalex.org/I170979836"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17256381,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"17","issue":"9","first_page":"522","last_page":"528"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.914746880531311},{"id":"https://openalex.org/keywords/inter-process-communication","display_name":"Inter-process communication","score":0.7623183131217957},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.7437794804573059},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.5234495997428894},{"id":"https://openalex.org/keywords/message-passing","display_name":"Message passing","score":0.501234769821167},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.47861379384994507},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.4691155254840851},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4628208577632904},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44975748658180237},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43033134937286377},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4075712561607361},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.4056510627269745}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.914746880531311},{"id":"https://openalex.org/C204156049","wikidata":"https://www.wikidata.org/wiki/Q751436","display_name":"Inter-process communication","level":2,"score":0.7623183131217957},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.7437794804573059},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.5234495997428894},{"id":"https://openalex.org/C854659","wikidata":"https://www.wikidata.org/wiki/Q1859284","display_name":"Message passing","level":2,"score":0.501234769821167},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.47861379384994507},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.4691155254840851},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4628208577632904},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44975748658180237},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43033134937286377},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4075712561607361},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4056510627269745},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0141-9331(09)91003-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(09)91003-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W100713736","https://openalex.org/W1893113121","https://openalex.org/W1972939043","https://openalex.org/W1978254772","https://openalex.org/W2001091500","https://openalex.org/W2039179345","https://openalex.org/W2054414072","https://openalex.org/W2057392949","https://openalex.org/W2101468026","https://openalex.org/W2153005994","https://openalex.org/W2175085668","https://openalex.org/W6604013637","https://openalex.org/W6639487180","https://openalex.org/W6682270870"],"related_works":["https://openalex.org/W1500167556","https://openalex.org/W1985165680","https://openalex.org/W4245497162","https://openalex.org/W1998761481","https://openalex.org/W2154020360","https://openalex.org/W2498758832","https://openalex.org/W184749201","https://openalex.org/W98999783","https://openalex.org/W2314805133","https://openalex.org/W2133825528"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}