{"id":"https://openalex.org/W2002703587","doi":"https://doi.org/10.1016/s0141-9331(02)00102-3","title":"Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system","display_name":"Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system","publication_year":2003,"publication_date":"2003-04-01","ids":{"openalex":"https://openalex.org/W2002703587","doi":"https://doi.org/10.1016/s0141-9331(02)00102-3","mag":"2002703587"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(02)00102-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(02)00102-3","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036139436","display_name":"Camel Tanougast","orcid":"https://orcid.org/0000-0002-5399-1683"},"institutions":[{"id":"https://openalex.org/I90183372","display_name":"Universit\u00e9 de Lorraine","ror":"https://ror.org/04vfs2w97","country_code":"FR","type":"education","lineage":["https://openalex.org/I90183372"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"C. Tanougast","raw_affiliation_strings":["Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France","institution_ids":["https://openalex.org/I90183372"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044192929","display_name":"Y. Berviller","orcid":"https://orcid.org/0000-0002-0059-3024"},"institutions":[{"id":"https://openalex.org/I90183372","display_name":"Universit\u00e9 de Lorraine","ror":"https://ror.org/04vfs2w97","country_code":"FR","type":"education","lineage":["https://openalex.org/I90183372"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Y. Berviller","raw_affiliation_strings":["Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France","institution_ids":["https://openalex.org/I90183372"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035214941","display_name":"Philippe Brunet","orcid":null},"institutions":[{"id":"https://openalex.org/I90183372","display_name":"Universit\u00e9 de Lorraine","ror":"https://ror.org/04vfs2w97","country_code":"FR","type":"education","lineage":["https://openalex.org/I90183372"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Brunet","raw_affiliation_strings":["Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France","institution_ids":["https://openalex.org/I90183372"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051882205","display_name":"Serge Weber","orcid":"https://orcid.org/0000-0002-7851-9916"},"institutions":[{"id":"https://openalex.org/I90183372","display_name":"Universit\u00e9 de Lorraine","ror":"https://ror.org/04vfs2w97","country_code":"FR","type":"education","lineage":["https://openalex.org/I90183372"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"S. Weber","raw_affiliation_strings":["Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France","institution_ids":["https://openalex.org/I90183372"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090445799","display_name":"Hassan Rabah","orcid":"https://orcid.org/0000-0001-6334-3084"},"institutions":[{"id":"https://openalex.org/I90183372","display_name":"Universit\u00e9 de Lorraine","ror":"https://ror.org/04vfs2w97","country_code":"FR","type":"education","lineage":["https://openalex.org/I90183372"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"H. Rabah","raw_affiliation_strings":["Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Instrumentation Electronique de Nancy, Universit\u00e9 de Nancy 1, BP 239, Vandoeuvre L\u00e8s Nancy 54506, France","institution_ids":["https://openalex.org/I90183372"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5036139436"],"corresponding_institution_ids":["https://openalex.org/I90183372"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":2.9568,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.91017795,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"27","issue":"3","first_page":"115","last_page":"130"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8944579362869263},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8931958675384521},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7436042428016663},{"id":"https://openalex.org/keywords/data-flow-analysis","display_name":"Data-flow analysis","score":0.6470990180969238},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.5486746430397034},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5290682911872864},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49021726846694946},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.47590503096580505},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.46575385332107544},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.46191927790641785},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.43078893423080444},{"id":"https://openalex.org/keywords/control-flow-graph","display_name":"Control flow graph","score":0.41199013590812683},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.385075181722641},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.37122124433517456},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.34582555294036865},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.1176007091999054}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8944579362869263},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8931958675384521},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7436042428016663},{"id":"https://openalex.org/C88468194","wikidata":"https://www.wikidata.org/wiki/Q1172416","display_name":"Data-flow analysis","level":3,"score":0.6470990180969238},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.5486746430397034},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5290682911872864},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49021726846694946},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.47590503096580505},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.46575385332107544},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.46191927790641785},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.43078893423080444},{"id":"https://openalex.org/C27458966","wikidata":"https://www.wikidata.org/wiki/Q1187693","display_name":"Control flow graph","level":2,"score":0.41199013590812683},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.385075181722641},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.37122124433517456},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.34582555294036865},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.1176007091999054},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1016/s0141-9331(02)00102-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(02)00102-3","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-02337831v1","is_oa":false,"landing_page_url":"https://hal.science/hal-02337831","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Microprocessors and Microsystems: Embedded Hardware Design , 2003, 27 (3), pp.115-130. &#x27E8;10.1016/S0141-9331(02)00102-3&#x27E9;","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:HAL:hal-03983762v1","is_oa":false,"landing_page_url":"https://hal.science/hal-03983762","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Microprocessors and Microsystems: Embedded Hardware Design , 2003, 27 (3), pp.115-130. &#x27E8;10.1016/S0141-9331(02)00102-3&#x27E9;","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W578592461","https://openalex.org/W1564544652","https://openalex.org/W1572721274","https://openalex.org/W1584356919","https://openalex.org/W1600419216","https://openalex.org/W1968241279","https://openalex.org/W1974169079","https://openalex.org/W2026320485","https://openalex.org/W2033291827","https://openalex.org/W2040202421","https://openalex.org/W2068041061","https://openalex.org/W2076639376","https://openalex.org/W2090068045","https://openalex.org/W2097451609","https://openalex.org/W2100304552","https://openalex.org/W2105003917","https://openalex.org/W2115250772","https://openalex.org/W2121863986","https://openalex.org/W2125771785","https://openalex.org/W2131176628","https://openalex.org/W2136539269","https://openalex.org/W2138610902","https://openalex.org/W2145622053","https://openalex.org/W2148549147","https://openalex.org/W2150405043","https://openalex.org/W2155742588","https://openalex.org/W2169333805","https://openalex.org/W2169345841","https://openalex.org/W2169601811","https://openalex.org/W2462300308","https://openalex.org/W6634365859","https://openalex.org/W6634700816","https://openalex.org/W6635752020","https://openalex.org/W6679639435","https://openalex.org/W6682198959","https://openalex.org/W6682806571","https://openalex.org/W6684688204"],"related_works":["https://openalex.org/W2151163382","https://openalex.org/W4256382613","https://openalex.org/W59945861","https://openalex.org/W1551967076","https://openalex.org/W2052485000","https://openalex.org/W1549956274","https://openalex.org/W2084443973","https://openalex.org/W94523631","https://openalex.org/W2888754212","https://openalex.org/W1528221867"],"abstract_inverted_index":null,"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
