{"id":"https://openalex.org/W2059019506","doi":"https://doi.org/10.1016/s0141-9331(02)00081-9","title":"PLL based ASIC system for DSP real-time analogue interface","display_name":"PLL based ASIC system for DSP real-time analogue interface","publication_year":2003,"publication_date":"2003-02-01","ids":{"openalex":"https://openalex.org/W2059019506","doi":"https://doi.org/10.1016/s0141-9331(02)00081-9","mag":"2059019506"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(02)00081-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(02)00081-9","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037615061","display_name":"Abdulhussain E. Mahdi","orcid":"https://orcid.org/0000-0002-2681-6222"},"institutions":[{"id":"https://openalex.org/I230495080","display_name":"University of Limerick","ror":"https://ror.org/00a0n9e72","country_code":"IE","type":"education","lineage":["https://openalex.org/I230495080"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"A.E. Mahdi","raw_affiliation_strings":["Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland","Department of Electronic & Computer Engineering University of Limerick, Limerick, Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland","institution_ids":["https://openalex.org/I230495080"]},{"raw_affiliation_string":"Department of Electronic & Computer Engineering University of Limerick, Limerick, Ireland","institution_ids":["https://openalex.org/I230495080"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053889011","display_name":"Ian Grout","orcid":"https://orcid.org/0000-0003-1462-0481"},"institutions":[{"id":"https://openalex.org/I230495080","display_name":"University of Limerick","ror":"https://ror.org/00a0n9e72","country_code":"IE","type":"education","lineage":["https://openalex.org/I230495080"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"I.A. Grout","raw_affiliation_strings":["Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland","Department of Electronic & Computer Engineering University of Limerick, Limerick, Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, University of Limerick, Limerick, Ireland","institution_ids":["https://openalex.org/I230495080"]},{"raw_affiliation_string":"Department of Electronic & Computer Engineering University of Limerick, Limerick, Ireland","institution_ids":["https://openalex.org/I230495080"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5037615061"],"corresponding_institution_ids":["https://openalex.org/I230495080"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15063068,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"27","issue":"1","first_page":"9","last_page":"17"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8158072829246521},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7958333492279053},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7761787176132202},{"id":"https://openalex.org/keywords/interrupt","display_name":"Interrupt","score":0.7622621655464172},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.7025539875030518},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6361573338508606},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5887992978096008},{"id":"https://openalex.org/keywords/texas-instruments-davinci","display_name":"Texas Instruments DaVinci","score":0.49117013812065125},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44865602254867554},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4295303225517273},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4250558018684387},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.42361265420913696},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3252488374710083},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.15406328439712524},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.10891985893249512}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8158072829246521},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7958333492279053},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7761787176132202},{"id":"https://openalex.org/C41661131","wikidata":"https://www.wikidata.org/wiki/Q220764","display_name":"Interrupt","level":3,"score":0.7622621655464172},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.7025539875030518},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6361573338508606},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5887992978096008},{"id":"https://openalex.org/C45549533","wikidata":"https://www.wikidata.org/wiki/Q7707766","display_name":"Texas Instruments DaVinci","level":4,"score":0.49117013812065125},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44865602254867554},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4295303225517273},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4250558018684387},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.42361265420913696},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3252488374710083},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.15406328439712524},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.10891985893249512},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0141-9331(02)00081-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(02)00081-9","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W181306761","https://openalex.org/W1490366974","https://openalex.org/W1497544191","https://openalex.org/W1600620169","https://openalex.org/W1603444000","https://openalex.org/W2033491279","https://openalex.org/W2069501481","https://openalex.org/W3094114204","https://openalex.org/W6842705195"],"related_works":["https://openalex.org/W2390600871","https://openalex.org/W2379610108","https://openalex.org/W1554640771","https://openalex.org/W2391418538","https://openalex.org/W2392403476","https://openalex.org/W2169690706","https://openalex.org/W2072806596","https://openalex.org/W2348897940","https://openalex.org/W2372514056","https://openalex.org/W2373806376"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
