{"id":"https://openalex.org/W2078049990","doi":"https://doi.org/10.1016/s0141-9331(01)00146-6","title":"A performance evaluation of cache injection in bus-based shared memory multiprocessors","display_name":"A performance evaluation of cache injection in bus-based shared memory multiprocessors","publication_year":2002,"publication_date":"2002-03-01","ids":{"openalex":"https://openalex.org/W2078049990","doi":"https://doi.org/10.1016/s0141-9331(01)00146-6","mag":"2078049990"},"language":"en","primary_location":{"id":"doi:10.1016/s0141-9331(01)00146-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(01)00146-6","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083066313","display_name":"Aleksandar Milenkovi\u0107","orcid":"https://orcid.org/0000-0002-9359-4594"},"institutions":[{"id":"https://openalex.org/I82495205","display_name":"University of Alabama in Huntsville","ror":"https://ror.org/02zsxwr40","country_code":"US","type":"education","lineage":["https://openalex.org/I82495205"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Aleksandar Milenkovic","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Alabama in Huntsville, Huntsville, AL 35899, USA","Department of Electrical and Computer Engineering University of Alabama in Huntsville Huntsville, AL 35899 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Alabama in Huntsville, Huntsville, AL 35899, USA","institution_ids":["https://openalex.org/I82495205"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Alabama in Huntsville Huntsville, AL 35899 USA","institution_ids":["https://openalex.org/I82495205"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030033846","display_name":"Veljko Milutinovi\u0107","orcid":"https://orcid.org/0000-0002-9380-5232"},"institutions":[{"id":"https://openalex.org/I4068193","display_name":"University of Belgrade","ror":"https://ror.org/02qsmb048","country_code":"RS","type":"education","lineage":["https://openalex.org/I4068193"]}],"countries":["RS"],"is_corresponding":false,"raw_author_name":"Veljko Milutinovic","raw_affiliation_strings":["Department of Computer Engineering, University of Belgrade, Yugoslavia"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Belgrade, Yugoslavia","institution_ids":["https://openalex.org/I4068193"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5083066313"],"corresponding_institution_ids":["https://openalex.org/I82495205"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.1074399,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"26","issue":"2","first_page":"51","last_page":"61"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9124366044998169},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.7466000318527222},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.6973183155059814},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.6870630979537964},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.627143383026123},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6146388649940491},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.6000970602035522},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.5523442029953003},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.5376471281051636},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5148738622665405},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.49982452392578125},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.465583473443985},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4568234086036682},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.44792813062667847},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.44300851225852966},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.4358501732349396},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.38016507029533386},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.37454426288604736},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.371543824672699},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.358389675617218},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.35824280977249146},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.25585752725601196},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.13043081760406494}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9124366044998169},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.7466000318527222},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.6973183155059814},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.6870630979537964},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.627143383026123},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6146388649940491},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.6000970602035522},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5523442029953003},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.5376471281051636},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5148738622665405},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.49982452392578125},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.465583473443985},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4568234086036682},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.44792813062667847},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.44300851225852966},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.4358501732349396},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.38016507029533386},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.37454426288604736},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.371543824672699},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.358389675617218},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.35824280977249146},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.25585752725601196},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.13043081760406494},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1016/s0141-9331(01)00146-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0141-9331(01)00146-6","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.65.1917","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.65.1917","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.uah.edu/~milenka/docs/am-micpro01.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1560664625","https://openalex.org/W1850405760","https://openalex.org/W1970077382","https://openalex.org/W1991582153","https://openalex.org/W1991881938","https://openalex.org/W2050487400","https://openalex.org/W2077790567","https://openalex.org/W2097219246","https://openalex.org/W2104933342","https://openalex.org/W2121459535","https://openalex.org/W2127547524","https://openalex.org/W2144014608","https://openalex.org/W2145021036","https://openalex.org/W2148740960","https://openalex.org/W2152695949","https://openalex.org/W2154554354","https://openalex.org/W2162826731","https://openalex.org/W2165112931","https://openalex.org/W2294192910","https://openalex.org/W4235872354","https://openalex.org/W4245453750"],"related_works":["https://openalex.org/W2148887883","https://openalex.org/W2091637093","https://openalex.org/W2163875126","https://openalex.org/W2407815036","https://openalex.org/W2008090428","https://openalex.org/W2188202186","https://openalex.org/W1768902350","https://openalex.org/W2810517735","https://openalex.org/W2149861845","https://openalex.org/W1545683692"],"abstract_inverted_index":null,"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}