{"id":"https://openalex.org/W2024075038","doi":"https://doi.org/10.1016/s0026-2714(03)00092-1","title":"Improvement of integrated circuit testing reliability by using the defect based approach","display_name":"Improvement of integrated circuit testing reliability by using the defect based approach","publication_year":2003,"publication_date":"2003-05-19","ids":{"openalex":"https://openalex.org/W2024075038","doi":"https://doi.org/10.1016/s0026-2714(03)00092-1","mag":"2024075038"},"language":"en","primary_location":{"id":"doi:10.1016/s0026-2714(03)00092-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0026-2714(03)00092-1","pdf_url":null,"source":{"id":"https://openalex.org/S133646729","display_name":"Microelectronics Reliability","issn_l":"0026-2714","issn":["0026-2714","1872-941X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Reliability","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034089826","display_name":"Dominik Kasprowicz","orcid":"https://orcid.org/0000-0002-3480-6585"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Dominik Kasprowicz","raw_affiliation_strings":["Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","#N#Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","institution_ids":["https://openalex.org/I108403487"]},{"raw_affiliation_string":"#N#Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","institution_ids":["https://openalex.org/I108403487"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056589147","display_name":"Witold A. Pleskacz","orcid":"https://orcid.org/0000-0001-7064-503X"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Witold A. Pleskacz","raw_affiliation_strings":["Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","#N#Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","institution_ids":["https://openalex.org/I108403487"]},{"raw_affiliation_string":"#N#Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, Warsaw 00-662, Poland","institution_ids":["https://openalex.org/I108403487"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5034089826"],"corresponding_institution_ids":["https://openalex.org/I108403487"],"apc_list":{"value":2190,"currency":"USD","value_usd":2190},"apc_paid":null,"fwci":1.0576,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.77374613,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"43","issue":"6","first_page":"945","last_page":"953"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7043144702911377},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6985526084899902},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.6186890602111816},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5816180109977722},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5738766193389893},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5242783427238464},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5220101475715637},{"id":"https://openalex.org/keywords/test-vector","display_name":"Test vector","score":0.5209635496139526},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5150582790374756},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.49331679940223694},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.454764187335968},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.4522736966609955},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.4388032853603363},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4354846477508545},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.4109959006309509},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3964247703552246},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3811190128326416},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27545106410980225},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17913305759429932},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.1686868965625763},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.09552156925201416},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09394210577011108},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.07061564922332764}],"concepts":[{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7043144702911377},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6985526084899902},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6186890602111816},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5816180109977722},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5738766193389893},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5242783427238464},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5220101475715637},{"id":"https://openalex.org/C100767440","wikidata":"https://www.wikidata.org/wiki/Q7705816","display_name":"Test vector","level":3,"score":0.5209635496139526},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5150582790374756},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.49331679940223694},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.454764187335968},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.4522736966609955},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.4388032853603363},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4354846477508545},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.4109959006309509},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3964247703552246},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3811190128326416},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27545106410980225},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17913305759429932},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.1686868965625763},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.09552156925201416},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09394210577011108},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07061564922332764},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0026-2714(03)00092-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0026-2714(03)00092-1","pdf_url":null,"source":{"id":"https://openalex.org/S133646729","display_name":"Microelectronics Reliability","issn_l":"0026-2714","issn":["0026-2714","1872-941X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Reliability","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W77054510","https://openalex.org/W119593532","https://openalex.org/W126937498","https://openalex.org/W597804870","https://openalex.org/W1483338234","https://openalex.org/W1554885925","https://openalex.org/W2114888195","https://openalex.org/W2126693329","https://openalex.org/W2161511567","https://openalex.org/W2167784659","https://openalex.org/W2534049282","https://openalex.org/W2900256418","https://openalex.org/W4302458519","https://openalex.org/W6604818409","https://openalex.org/W6605178140"],"related_works":["https://openalex.org/W2369589212","https://openalex.org/W2098752843","https://openalex.org/W2151556234","https://openalex.org/W2165817266","https://openalex.org/W2154529098","https://openalex.org/W2092357065","https://openalex.org/W2132684947","https://openalex.org/W2136680550","https://openalex.org/W2147400189","https://openalex.org/W1493811107"],"abstract_inverted_index":null,"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
