{"id":"https://openalex.org/W1994690588","doi":"https://doi.org/10.1016/s0026-2692(02)00124-6","title":"Parallel testing of multi-port static random access memories","display_name":"Parallel testing of multi-port static random access memories","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W1994690588","doi":"https://doi.org/10.1016/s0026-2692(02)00124-6","mag":"1994690588"},"language":"en","primary_location":{"id":"doi:10.1016/s0026-2692(02)00124-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0026-2692(02)00124-6","pdf_url":null,"source":{"id":"https://openalex.org/S98831239","display_name":"Microelectronics Journal","issn_l":"1879-2391","issn":["1879-2391"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081177348","display_name":"F. Karimi","orcid":"https://orcid.org/0000-0003-1144-7257"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"F. Karimi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA 02115, USA","Department of Electrical and Computer Engineering Northeastern University Boston MA 02115 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA 02115, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering Northeastern University Boston MA 02115 USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034116223","display_name":"S. Irrinki","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Irrinki","raw_affiliation_strings":["LSI Logic Inc., Memory Product and Test Development Engineering, 48660 Kato Road Fremont, CA 94539, USA"],"affiliations":[{"raw_affiliation_string":"LSI Logic Inc., Memory Product and Test Development Engineering, 48660 Kato Road Fremont, CA 94539, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080739611","display_name":"T. Crosby","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T. Crosby","raw_affiliation_strings":["LSI Logic Inc., Memory Product and Test Development Engineering, 48660 Kato Road Fremont, CA 94539, USA"],"affiliations":[{"raw_affiliation_string":"LSI Logic Inc., Memory Product and Test Development Engineering, 48660 Kato Road Fremont, CA 94539, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112970883","display_name":"N. Park","orcid":"https://orcid.org/0009-0000-0825-402X"},"institutions":[{"id":"https://openalex.org/I115475287","display_name":"Oklahoma State University","ror":"https://ror.org/01g9vbr38","country_code":"US","type":"education","lineage":["https://openalex.org/I115475287"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"N. Park","raw_affiliation_strings":["Department of Computer Science, Oklahoma State University, Stillwater, OK 74078, USA","Department of Computer Science, Oklahoma State University, Stillwater, OK, 74078, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Oklahoma State University, Stillwater, OK 74078, USA","institution_ids":["https://openalex.org/I115475287"]},{"raw_affiliation_string":"Department of Computer Science, Oklahoma State University, Stillwater, OK, 74078, USA#TAB#","institution_ids":["https://openalex.org/I115475287"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001979328","display_name":"Fabrizio Lombardi","orcid":"https://orcid.org/0000-0003-3152-3245"},"institutions":[{"id":"https://openalex.org/I115475287","display_name":"Oklahoma State University","ror":"https://ror.org/01g9vbr38","country_code":"US","type":"education","lineage":["https://openalex.org/I115475287"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"F. Lombardi","raw_affiliation_strings":["Department of Computer Science, Oklahoma State University, Stillwater, OK 74078, USA","Department of Computer Science, Oklahoma State University, Stillwater, OK, 74078, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Oklahoma State University, Stillwater, OK 74078, USA","institution_ids":["https://openalex.org/I115475287"]},{"raw_affiliation_string":"Department of Computer Science, Oklahoma State University, Stillwater, OK, 74078, USA#TAB#","institution_ids":["https://openalex.org/I115475287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5112970883"],"corresponding_institution_ids":["https://openalex.org/I115475287"],"apc_list":{"value":2370,"currency":"USD","value_usd":2370},"apc_paid":null,"fwci":0.5128,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.65522175,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"34","issue":"1","first_page":"3","last_page":"21"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.8183072805404663},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7075085043907166},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6239740252494812},{"id":"https://openalex.org/keywords/parallel-port","display_name":"Parallel port","score":0.5393360257148743},{"id":"https://openalex.org/keywords/embedding","display_name":"Embedding","score":0.5302683115005493},{"id":"https://openalex.org/keywords/reading","display_name":"Reading (process)","score":0.5149481892585754},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.477884441614151},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.17345505952835083},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16975009441375732},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09038954973220825},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.06811884045600891}],"concepts":[{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.8183072805404663},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7075085043907166},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6239740252494812},{"id":"https://openalex.org/C202683721","wikidata":"https://www.wikidata.org/wiki/Q190440","display_name":"Parallel port","level":3,"score":0.5393360257148743},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.5302683115005493},{"id":"https://openalex.org/C554936623","wikidata":"https://www.wikidata.org/wiki/Q199657","display_name":"Reading (process)","level":2,"score":0.5149481892585754},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.477884441614151},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.17345505952835083},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16975009441375732},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09038954973220825},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.06811884045600891},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/s0026-2692(02)00124-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/s0026-2692(02)00124-6","pdf_url":null,"source":{"id":"https://openalex.org/S98831239","display_name":"Microelectronics Journal","issn_l":"1879-2391","issn":["1879-2391"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W44310621","https://openalex.org/W1519312007","https://openalex.org/W1798884210","https://openalex.org/W1967824305","https://openalex.org/W2097100364","https://openalex.org/W2102249580","https://openalex.org/W2121938580","https://openalex.org/W2130559068","https://openalex.org/W2137716383","https://openalex.org/W2141736039","https://openalex.org/W2160465664","https://openalex.org/W2169877796","https://openalex.org/W2171229299","https://openalex.org/W6675208245","https://openalex.org/W6679262628","https://openalex.org/W6683512288","https://openalex.org/W6685079268","https://openalex.org/W6685440866"],"related_works":["https://openalex.org/W2081900870","https://openalex.org/W2753223082","https://openalex.org/W3025119703","https://openalex.org/W4387941415","https://openalex.org/W2347757802","https://openalex.org/W600655143","https://openalex.org/W4385372470","https://openalex.org/W2082438799","https://openalex.org/W1966986837","https://openalex.org/W2183306018"],"abstract_inverted_index":null,"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
