{"id":"https://openalex.org/W7153061044","doi":"https://doi.org/10.1016/j.vlsi.2026.102741","title":"Cost-aware test pattern ordering for VLSI using an enhanced LSTNet architecture","display_name":"Cost-aware test pattern ordering for VLSI using an enhanced LSTNet architecture","publication_year":2026,"publication_date":"2026-04-10","ids":{"openalex":"https://openalex.org/W7153061044","doi":"https://doi.org/10.1016/j.vlsi.2026.102741"},"language":"en","primary_location":{"id":"doi:10.1016/j.vlsi.2026.102741","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.vlsi.2026.102741","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5133346211","display_name":"Bintao Geng","orcid":null},"institutions":[{"id":"https://openalex.org/I151878197","display_name":"Pingdingshan University","ror":"https://ror.org/026c29h90","country_code":"CN","type":"education","lineage":["https://openalex.org/I151878197"]},{"id":"https://openalex.org/I4210113703","display_name":"Henan University of Urban Construction","ror":"https://ror.org/01x1skr92","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210113703"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bintao Geng","raw_affiliation_strings":["Department of Computer Engineering, Pingdingshan Polytechnic College, Henan, 467001, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Pingdingshan Polytechnic College, Henan, 467001, China","institution_ids":["https://openalex.org/I151878197","https://openalex.org/I4210113703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5133357737","display_name":"Ying Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I151878197","display_name":"Pingdingshan University","ror":"https://ror.org/026c29h90","country_code":"CN","type":"education","lineage":["https://openalex.org/I151878197"]},{"id":"https://openalex.org/I4210113703","display_name":"Henan University of Urban Construction","ror":"https://ror.org/01x1skr92","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210113703"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ying Sun","raw_affiliation_strings":["Department of Computer Engineering, Pingdingshan Polytechnic College, Henan, 467001, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Pingdingshan Polytechnic College, Henan, 467001, China","institution_ids":["https://openalex.org/I151878197","https://openalex.org/I4210113703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045664642","display_name":"Tai Song","orcid":"https://orcid.org/0000-0002-7082-4211"},"institutions":[{"id":"https://openalex.org/I143868143","display_name":"Anhui University","ror":"https://ror.org/05th6yx34","country_code":"CN","type":"education","lineage":["https://openalex.org/I143868143"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Tai Song","raw_affiliation_strings":["School of Integrated Circuits, Anhui University, Hefei 230601, China"],"raw_orcid":"https://orcid.org/0000-0002-7082-4211","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Anhui University, Hefei 230601, China","institution_ids":["https://openalex.org/I143868143"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5133336671","display_name":"Yadong Li","orcid":null},"institutions":[{"id":"https://openalex.org/I181877577","display_name":"Shanxi University","ror":"https://ror.org/03y3e3s17","country_code":"CN","type":"education","lineage":["https://openalex.org/I181877577"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yadong Li","raw_affiliation_strings":["Shanxi Key Laboratory of Advanced Semiconductor Optoelectronic Devices and Integrated Systems of China, Jincheng 048000, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanxi Key Laboratory of Advanced Semiconductor Optoelectronic Devices and Integrated Systems of China, Jincheng 048000, China","institution_ids":["https://openalex.org/I181877577"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5045664642"],"corresponding_institution_ids":["https://openalex.org/I143868143"],"apc_list":{"value":2150,"currency":"USD","value_usd":2150},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.83952703,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"109","issue":null,"first_page":"102741","last_page":"102741"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9675999879837036,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9675999879837036,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.011800000444054604,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.0020000000949949026,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.805400013923645},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4636000096797943},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4494999945163727},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.37529999017715454},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3560999929904938},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.34060001373291016}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.805400013923645},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5295000076293945},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4636000096797943},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4494999945163727},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41350001096725464},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3808000087738037},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.37529999017715454},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3560999929904938},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.34060001373291016},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3400000035762787},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33000001311302185},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32109999656677246},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.303600013256073},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.30309998989105225},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.29589998722076416},{"id":"https://openalex.org/C98025372","wikidata":"https://www.wikidata.org/wiki/Q477538","display_name":"Systems architecture","level":3,"score":0.2700999975204468},{"id":"https://openalex.org/C7166840","wikidata":"https://www.wikidata.org/wiki/Q1199682","display_name":"System testing","level":2,"score":0.2667999863624573},{"id":"https://openalex.org/C132519959","wikidata":"https://www.wikidata.org/wiki/Q3077373","display_name":"Test method","level":2,"score":0.2549999952316284},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.25369998812675476}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.vlsi.2026.102741","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.vlsi.2026.102741","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2016993958","https://openalex.org/W2033291878","https://openalex.org/W2035045696","https://openalex.org/W2085654583","https://openalex.org/W2167175161","https://openalex.org/W2169434152","https://openalex.org/W2295544414","https://openalex.org/W2614330301","https://openalex.org/W2914256504","https://openalex.org/W3034864980","https://openalex.org/W3196301423","https://openalex.org/W3207606975","https://openalex.org/W4255267096","https://openalex.org/W4283801252","https://openalex.org/W4309154741","https://openalex.org/W4366989049"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-04-29T09:16:38.111599","created_date":"2026-04-11T00:00:00"}