{"id":"https://openalex.org/W4415974272","doi":"https://doi.org/10.1016/j.procs.2025.09.158","title":"An Analysis and Implementation of the Switching Sequence Table Method","display_name":"An Analysis and Implementation of the Switching Sequence Table Method","publication_year":2025,"publication_date":"2025-01-01","ids":{"openalex":"https://openalex.org/W4415974272","doi":"https://doi.org/10.1016/j.procs.2025.09.158"},"language":"en","primary_location":{"id":"doi:10.1016/j.procs.2025.09.158","is_oa":true,"landing_page_url":"https://doi.org/10.1016/j.procs.2025.09.158","pdf_url":null,"source":{"id":"https://openalex.org/S120348307","display_name":"Procedia Computer Science","issn_l":"1877-0509","issn":["1877-0509"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Procedia Computer Science","raw_type":"journal-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://doi.org/10.1016/j.procs.2025.09.158","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009447334","display_name":"Piotr Czekalski","orcid":"https://orcid.org/0000-0003-3110-3603"},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Piotr Czekalski","raw_affiliation_strings":["Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5120285274","display_name":"Miros\u0142aw Borowiecki","orcid":null},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Miros\u0142aw Borowiecki","raw_affiliation_strings":["Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083480030","display_name":"Boles\u0142aw Pochopie\u0144","orcid":null},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Boles\u0142aw Pochopie\u0144","raw_affiliation_strings":["Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Akademicka 16, 44-100, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068408764","display_name":"Godlove Suila Kuaban","orcid":"https://orcid.org/0000-0002-3321-4414"},"institutions":[{"id":"https://openalex.org/I4210122744","display_name":"Institute of Theoretical and Applied Informatics","ror":"https://ror.org/037p52j25","country_code":"PL","type":"facility","lineage":["https://openalex.org/I4210122744","https://openalex.org/I99542240"]},{"id":"https://openalex.org/I99542240","display_name":"Polish Academy of Sciences","ror":"https://ror.org/01dr6c206","country_code":"PL","type":"government","lineage":["https://openalex.org/I99542240"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Godlove Suila Kuaban","raw_affiliation_strings":["Institute of Theoretical and Applied Informatics, Polish Academy of Sciences, Baltycka 5, 44-100, Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Theoretical and Applied Informatics, Polish Academy of Sciences, Baltycka 5, 44-100, Gliwice, Poland","institution_ids":["https://openalex.org/I4210122744","https://openalex.org/I99542240"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5009447334"],"corresponding_institution_ids":["https://openalex.org/I119004910"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.39850002,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"270","issue":null,"first_page":"397","last_page":"406"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.2062000036239624,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.2062000036239624,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.16030000150203705,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.1160999983549118,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.6953999996185303},{"id":"https://openalex.org/keywords/sequence","display_name":"Sequence (biology)","score":0.657800018787384},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.652999997138977},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.46470001339912415},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.3734999895095825},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.3562000095844269}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8790000081062317},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.6953999996185303},{"id":"https://openalex.org/C2778112365","wikidata":"https://www.wikidata.org/wiki/Q3511065","display_name":"Sequence (biology)","level":2,"score":0.657800018787384},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.652999997138977},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5170000195503235},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.46470001339912415},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.40959998965263367},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.3734999895095825},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.3562000095844269},{"id":"https://openalex.org/C56949724","wikidata":"https://www.wikidata.org/wiki/Q219079","display_name":"Truth table","level":2,"score":0.3310000002384186},{"id":"https://openalex.org/C311688","wikidata":"https://www.wikidata.org/wiki/Q2393193","display_name":"Time complexity","level":2,"score":0.3082999885082245},{"id":"https://openalex.org/C172967692","wikidata":"https://www.wikidata.org/wiki/Q747762","display_name":"Decision table","level":3,"score":0.29899999499320984}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.procs.2025.09.158","is_oa":true,"landing_page_url":"https://doi.org/10.1016/j.procs.2025.09.158","pdf_url":null,"source":{"id":"https://openalex.org/S120348307","display_name":"Procedia Computer Science","issn_l":"1877-0509","issn":["1877-0509"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Procedia Computer Science","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1016/j.procs.2025.09.158","is_oa":true,"landing_page_url":"https://doi.org/10.1016/j.procs.2025.09.158","pdf_url":null,"source":{"id":"https://openalex.org/S120348307","display_name":"Procedia Computer Science","issn_l":"1877-0509","issn":["1877-0509"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Procedia Computer Science","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3972934574","display_name":null,"funder_award_id":"2022-1-PL01-KA220-HED-000085090","funder_id":"https://openalex.org/F4320324727","funder_display_name":"Silesian University of Technology"}],"funders":[{"id":"https://openalex.org/F4320324727","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2075773711","https://openalex.org/W3040258995","https://openalex.org/W3127833645","https://openalex.org/W3175054783"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"details":[2],"the":[3,7,38,76],"algorithm":[4,21],"implementation":[5],"of":[6,27,41],"Switching":[8,77],"Sequence":[9,78],"Table":[10,79],"method":[11,69],"in":[12,25],"asynchronous":[13],"sequential":[14],"circuit":[15],"Boolean":[16],"switching":[17],"system":[18],"design.":[19],"The":[20,66],"is":[22,64],"theoretically":[23],"analysed":[24],"terms":[26],"its":[28],"computational":[29],"complexity":[30],"and":[31,44],"validated":[32],"through":[33],"actual":[34],"experiments.":[35],"It":[36,49],"discusses":[37],"multidimensional":[39,57],"problem":[40,58,63],"various":[42],"parameters":[43],"their":[45],"impact":[46],"on":[47],"performance.":[48],"then":[50],"presents":[51],"analytical":[52],"evidence":[53],"that":[54],"reducing":[55],"this":[56],"to":[59],"a":[60],"standard,":[61],"one-dimensional":[62],"feasible.":[65],"authors":[67],"consider":[68],"challenges":[70],"when":[71],"implementing":[72],"computing":[73],"modules":[74],"for":[75],"method.":[80]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-11-06T00:00:00"}