{"id":"https://openalex.org/W2078430924","doi":"https://doi.org/10.1016/j.micpro.2009.06.003","title":"Extending an embedded RISC microprocessor for efficient translation based Java execution","display_name":"Extending an embedded RISC microprocessor for efficient translation based Java execution","publication_year":2009,"publication_date":"2009-07-11","ids":{"openalex":"https://openalex.org/W2078430924","doi":"https://doi.org/10.1016/j.micpro.2009.06.003","mag":"2078430924"},"language":"en","primary_location":{"id":"doi:10.1016/j.micpro.2009.06.003","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.micpro.2009.06.003","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://doi.org/10.1016/j.micpro.2009.06.003","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069705909","display_name":"Isidoros Sideris","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Isidoros Sideris","raw_affiliation_strings":["Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece"],"affiliations":[{"raw_affiliation_string":"Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088085592","display_name":"Kiamal Pekmestzi","orcid":"https://orcid.org/0000-0001-8612-2700"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kiamal Pekmestzi","raw_affiliation_strings":["Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece"],"affiliations":[{"raw_affiliation_string":"Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089110665","display_name":"George Economakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Economakos","raw_affiliation_strings":["Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece"],"affiliations":[{"raw_affiliation_string":"Microprocessors and Digital Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, 9 Heroon Polytechneiou, Athens 15780, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069705909"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.2712,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.57701149,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"33","issue":"7-8","first_page":"415","last_page":"429"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9248167276382446},{"id":"https://openalex.org/keywords/embedded-java","display_name":"Embedded Java","score":0.7782988548278809},{"id":"https://openalex.org/keywords/java","display_name":"Java","score":0.6630924344062805},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.5835482478141785},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5704112648963928},{"id":"https://openalex.org/keywords/benchmarking","display_name":"Benchmarking","score":0.5533110499382019},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5183623433113098},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.515009880065918},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.48327475786209106},{"id":"https://openalex.org/keywords/real-time-java","display_name":"Real time Java","score":0.4769507944583893},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.45089343190193176},{"id":"https://openalex.org/keywords/strictfp","display_name":"strictfp","score":0.399983286857605},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3723333477973938},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3416725993156433}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9248167276382446},{"id":"https://openalex.org/C175224512","wikidata":"https://www.wikidata.org/wiki/Q1334980","display_name":"Embedded Java","level":5,"score":0.7782988548278809},{"id":"https://openalex.org/C548217200","wikidata":"https://www.wikidata.org/wiki/Q251","display_name":"Java","level":2,"score":0.6630924344062805},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5835482478141785},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5704112648963928},{"id":"https://openalex.org/C86251818","wikidata":"https://www.wikidata.org/wiki/Q816754","display_name":"Benchmarking","level":2,"score":0.5533110499382019},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5183623433113098},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.515009880065918},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.48327475786209106},{"id":"https://openalex.org/C132106392","wikidata":"https://www.wikidata.org/wiki/Q1373903","display_name":"Real time Java","level":3,"score":0.4769507944583893},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.45089343190193176},{"id":"https://openalex.org/C174954855","wikidata":"https://www.wikidata.org/wiki/Q7623626","display_name":"strictfp","level":4,"score":0.399983286857605},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3723333477973938},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3416725993156433},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1016/j.micpro.2009.06.003","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.micpro.2009.06.003","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/19601","is_oa":true,"landing_page_url":"http://doi.org/10.1016/j.micpro.2009.06.003","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Microprocessors and Microsystems","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/19601","is_oa":true,"landing_page_url":"http://doi.org/10.1016/j.micpro.2009.06.003","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Microprocessors and Microsystems","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1480157704","https://openalex.org/W1527602372","https://openalex.org/W1989883139","https://openalex.org/W2011697140","https://openalex.org/W2020191041","https://openalex.org/W2024633420","https://openalex.org/W2052878084","https://openalex.org/W2066444215","https://openalex.org/W2066744234","https://openalex.org/W2081744702","https://openalex.org/W2087348890","https://openalex.org/W2096403469","https://openalex.org/W2098771596","https://openalex.org/W2119554178","https://openalex.org/W2156139954","https://openalex.org/W2166335138","https://openalex.org/W2914202314","https://openalex.org/W4285719527","https://openalex.org/W6631546928","https://openalex.org/W6671988315"],"related_works":["https://openalex.org/W1780290295","https://openalex.org/W2121819567","https://openalex.org/W2361770091","https://openalex.org/W2041674393","https://openalex.org/W2109732569","https://openalex.org/W2008632039","https://openalex.org/W2098862077","https://openalex.org/W1553103764","https://openalex.org/W356503253","https://openalex.org/W2130106957"],"abstract_inverted_index":null,"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}