{"id":"https://openalex.org/W7106387291","doi":"https://doi.org/10.1016/j.mejo.2025.106976","title":"A modulation format and data-rate independent linear ratioed impedance and driver based true full duplex IO","display_name":"A modulation format and data-rate independent linear ratioed impedance and driver based true full duplex IO","publication_year":2025,"publication_date":"2025-11-21","ids":{"openalex":"https://openalex.org/W7106387291","doi":"https://doi.org/10.1016/j.mejo.2025.106976"},"language":"en","primary_location":{"id":"doi:10.1016/j.mejo.2025.106976","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.mejo.2025.106976","pdf_url":null,"source":{"id":"https://openalex.org/S98831239","display_name":"Microelectronics Journal","issn_l":"1879-2391","issn":["1879-2391"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Ganpat Anant Parulekar","orcid":"https://orcid.org/0009-0001-4838-298X"},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Ganpat Anant Parulekar","raw_affiliation_strings":["Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd"],"affiliations":[{"raw_affiliation_string":"Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Sandeep Goyal","orcid":null},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Sandeep Goyal","raw_affiliation_strings":["Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd"],"affiliations":[{"raw_affiliation_string":"Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Nikhil Ajith","orcid":null},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Nikhil Ajith","raw_affiliation_strings":["Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd"],"affiliations":[{"raw_affiliation_string":"Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Ishan Mishra","orcid":null},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ishan Mishra","raw_affiliation_strings":["Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd"],"affiliations":[{"raw_affiliation_string":"Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"last","author":{"id":null,"display_name":"Shalabh Gupta","orcid":null},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shalabh Gupta","raw_affiliation_strings":["Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd"],"affiliations":[{"raw_affiliation_string":"Cadence Design System India Pvt Ltd India, Indian Institute of Technology Bombay, L&T Infotech, Qualcomm India Pvt Ltd, Marvell India Pvt Ltd","institution_ids":["https://openalex.org/I19268510"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I19268510"],"apc_list":{"value":2370,"currency":"USD","value_usd":2370},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.52464821,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"168","issue":null,"first_page":"106976","last_page":"106976"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12791","display_name":"Full-Duplex Wireless Communications","score":0.9437000155448914,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12791","display_name":"Full-Duplex Wireless Communications","score":0.9437000155448914,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.022600000724196434,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.007400000002235174,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.6886000037193298},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5613999962806702},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5591999888420105},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4772000014781952},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.4618000090122223},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.43880000710487366},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.39989998936653137},{"id":"https://openalex.org/keywords/analog-transmission","display_name":"Analog transmission","score":0.38190001249313354}],"concepts":[{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.6886000037193298},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6474999785423279},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5893999934196472},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5613999962806702},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5591999888420105},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4772000014781952},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.4618000090122223},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.43880000710487366},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.39989998936653137},{"id":"https://openalex.org/C22676131","wikidata":"https://www.wikidata.org/wiki/Q4751065","display_name":"Analog transmission","level":4,"score":0.38190001249313354},{"id":"https://openalex.org/C11930861","wikidata":"https://www.wikidata.org/wiki/Q181417","display_name":"Frequency modulation","level":3,"score":0.36480000615119934},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35019999742507935},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.3416000008583069},{"id":"https://openalex.org/C99611785","wikidata":"https://www.wikidata.org/wiki/Q6453233","display_name":"Duplex (building)","level":3,"score":0.3271999955177307},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2913999855518341},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.2906999886035919},{"id":"https://openalex.org/C201905106","wikidata":"https://www.wikidata.org/wiki/Q183755","display_name":"Amplitude modulation","level":4,"score":0.2856999933719635},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.28380000591278076},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.2818000018596649},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.2703999876976013},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2687999904155731},{"id":"https://openalex.org/C40409654","wikidata":"https://www.wikidata.org/wiki/Q375889","display_name":"Orthogonal frequency-division multiplexing","level":3,"score":0.26600000262260437},{"id":"https://openalex.org/C26262908","wikidata":"https://www.wikidata.org/wiki/Q1307489","display_name":"Input impedance","level":3,"score":0.26010000705718994},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.2565000057220459}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.mejo.2025.106976","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.mejo.2025.106976","pdf_url":null,"source":{"id":"https://openalex.org/S98831239","display_name":"Microelectronics Journal","issn_l":"1879-2391","issn":["1879-2391"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5874558091163635,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2081089490","https://openalex.org/W2131583913","https://openalex.org/W2143155486","https://openalex.org/W2170598017","https://openalex.org/W2497599918","https://openalex.org/W2733802052","https://openalex.org/W2995181490","https://openalex.org/W4226159896","https://openalex.org/W4313886962"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-11-23T00:00:00"}