{"id":"https://openalex.org/W7165537233","doi":"https://doi.org/10.1016/j.dsp.2026.106348","title":"Optimal realization and FPGA verification of H\u221e overflow-stable digital filters via minimum sensitivity transformation","display_name":"Optimal realization and FPGA verification of H\u221e overflow-stable digital filters via minimum sensitivity transformation","publication_year":2026,"publication_date":"2026-06-22","ids":{"openalex":"https://openalex.org/W7165537233","doi":"https://doi.org/10.1016/j.dsp.2026.106348"},"language":"en","primary_location":{"id":"doi:10.1016/j.dsp.2026.106348","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.dsp.2026.106348","pdf_url":null,"source":{"id":"https://openalex.org/S64117906","display_name":"Digital Signal Processing","issn_l":"1051-2004","issn":["1051-2004","1095-4333"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Digital Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5139105543","display_name":"R.R. Hari","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hari R\u2024R\u2024","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021908794","display_name":"Srinivasulu Jogi","orcid":"https://orcid.org/0000-0002-3922-9705"},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Srinivasulu Jogi","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India"],"raw_orcid":"https://orcid.org/0000-0002-3922-9705","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India","institution_ids":["https://openalex.org/I122964287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5117640322","display_name":"K Kannaiah","orcid":null},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. Kannaiah","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India","institution_ids":["https://openalex.org/I122964287"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5139117344","display_name":"B. Naresh Kumar Reddy","orcid":null},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"B. Naresh Kumar Reddy","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India","institution_ids":["https://openalex.org/I122964287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5021908794"],"corresponding_institution_ids":["https://openalex.org/I122964287"],"apc_list":{"value":2480,"currency":"USD","value_usd":2480},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.8201581,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"183","issue":null,"first_page":"106348","last_page":"106348"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.7225000262260437,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.7225000262260437,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.09860000014305115,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.057500001043081284,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.8025000095367432},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.6845999956130981},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6572999954223633},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.6448000073432922},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.6244000196456909},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.44350001215934753}],"concepts":[{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.8025000095367432},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.6845999956130981},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6775000095367432},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6572999954223633},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.6448000073432922},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.6244000196456909},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.44350001215934753},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.3716000020503998},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3522000014781952},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3456000089645386},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3312000036239624},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3253999948501587},{"id":"https://openalex.org/C51297928","wikidata":"https://www.wikidata.org/wiki/Q7001207","display_name":"Network synthesis filters","level":2,"score":0.3052999973297119},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.2694000005722046},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.25920000672340393}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.dsp.2026.106348","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.dsp.2026.106348","pdf_url":null,"source":{"id":"https://openalex.org/S64117906","display_name":"Digital Signal Processing","issn_l":"1051-2004","issn":["1051-2004","1095-4333"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Digital Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1977727149","https://openalex.org/W2083325963","https://openalex.org/W2106223049","https://openalex.org/W2155688589","https://openalex.org/W2158513532","https://openalex.org/W2299724360","https://openalex.org/W2521856433","https://openalex.org/W2910968044","https://openalex.org/W3195017880","https://openalex.org/W3199481221","https://openalex.org/W4281909986","https://openalex.org/W4293193340","https://openalex.org/W4303709973","https://openalex.org/W4385655079","https://openalex.org/W4390939360","https://openalex.org/W4406820961"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-25T06:16:34.145877","created_date":"2026-06-23T00:00:00"}