{"id":"https://openalex.org/W2055757880","doi":"https://doi.org/10.1016/1383-7621(96)00017-3","title":"VHDL synthesis description portability: The need for Level synthesis subsets","display_name":"VHDL synthesis description portability: The need for Level synthesis subsets","publication_year":1996,"publication_date":"1996-09-01","ids":{"openalex":"https://openalex.org/W2055757880","doi":"https://doi.org/10.1016/1383-7621(96)00017-3","mag":"2055757880"},"language":"en","primary_location":{"id":"doi:10.1016/1383-7621(96)00017-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/1383-7621(96)00017-3","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008140708","display_name":"M. Selz","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Manfred Selz","raw_affiliation_strings":["Lehrstuhl f\u00fcr Rechnergest\u00fctzten Schaltungsentwurf, Universit\u00e4t Erlangen-N\u00fcrnberg, Cauerstra\u03b2e 6, D-91058 Erlangen, Germany"],"affiliations":[{"raw_affiliation_string":"Lehrstuhl f\u00fcr Rechnergest\u00fctzten Schaltungsentwurf, Universit\u00e4t Erlangen-N\u00fcrnberg, Cauerstra\u03b2e 6, D-91058 Erlangen, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046956677","display_name":"Wolfgang Ecker","orcid":"https://orcid.org/0000-0002-9362-8096"},"institutions":[{"id":"https://openalex.org/I1325886976","display_name":"Siemens (Germany)","ror":"https://ror.org/059mq0909","country_code":"DE","type":"company","lineage":["https://openalex.org/I1325886976"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wolfgang Ecker","raw_affiliation_strings":["Siemens AG, Central Research and Development, Otto-Hahn-Ring 6, 81730 Munich, Germany","Siemens AG, Central Research and Development, Otto-Hahn-Ring 6, 81730 Munich Germany"],"affiliations":[{"raw_affiliation_string":"Siemens AG, Central Research and Development, Otto-Hahn-Ring 6, 81730 Munich, Germany","institution_ids":["https://openalex.org/I1325886976"]},{"raw_affiliation_string":"Siemens AG, Central Research and Development, Otto-Hahn-Ring 6, 81730 Munich Germany","institution_ids":["https://openalex.org/I1325886976"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032788928","display_name":"Eugenio Villar","orcid":"https://orcid.org/0000-0002-6541-6176"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Eugenio Villar","raw_affiliation_strings":["Microelectronics Group, ETS1 Industriales y de Telccomunicacion, University of Cantabria, Avda. Los Castros s/n, 39005 Santander, Spain"],"affiliations":[{"raw_affiliation_string":"Microelectronics Group, ETS1 Industriales y de Telccomunicacion, University of Cantabria, Avda. Los Castros s/n, 39005 Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5032788928"],"corresponding_institution_ids":["https://openalex.org/I13134134"],"apc_list":{"value":2800,"currency":"USD","value_usd":2800},"apc_paid":null,"fwci":0.414,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.69133526,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"42","issue":"2","first_page":"105","last_page":"116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.9374340772628784},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.9072223901748657},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8979629278182983},{"id":"https://openalex.org/keywords/reusability","display_name":"Reusability","score":0.6668621301651001},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5153048038482666},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.42272037267684937},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.41887518763542175},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.373302698135376},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3546002507209778},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.18422815203666687},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.12893590331077576}],"concepts":[{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.9374340772628784},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.9072223901748657},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8979629278182983},{"id":"https://openalex.org/C137981799","wikidata":"https://www.wikidata.org/wiki/Q1369184","display_name":"Reusability","level":3,"score":0.6668621301651001},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5153048038482666},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.42272037267684937},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.41887518763542175},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.373302698135376},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3546002507209778},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.18422815203666687},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.12893590331077576}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/1383-7621(96)00017-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/1383-7621(96)00017-3","pdf_url":null,"source":{"id":"https://openalex.org/S127660348","display_name":"Journal of Systems Architecture","issn_l":"1383-7621","issn":["1383-7621","1873-6165"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Systems Architecture","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Partnerships for the goals","id":"https://metadata.un.org/sdg/17","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W150843462","https://openalex.org/W589675808","https://openalex.org/W1593445040","https://openalex.org/W1977298531","https://openalex.org/W2034480089","https://openalex.org/W2038904603","https://openalex.org/W2411059367","https://openalex.org/W2914309308","https://openalex.org/W6606166756","https://openalex.org/W6659255710","https://openalex.org/W6660231948","https://openalex.org/W6714808700"],"related_works":["https://openalex.org/W2901381009","https://openalex.org/W4281656368","https://openalex.org/W4295990858","https://openalex.org/W2352677973","https://openalex.org/W2365161868","https://openalex.org/W2407542865","https://openalex.org/W2112885082","https://openalex.org/W4322101364","https://openalex.org/W2055757880","https://openalex.org/W2077870657"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}