{"id":"https://openalex.org/W1993847066","doi":"https://doi.org/10.1016/0167-9260(87)90002-2","title":"Combinational static CMOS networks","display_name":"Combinational static CMOS networks","publication_year":1987,"publication_date":"1987-06-01","ids":{"openalex":"https://openalex.org/W1993847066","doi":"https://doi.org/10.1016/0167-9260(87)90002-2","mag":"1993847066"},"language":"en","primary_location":{"id":"doi:10.1016/0167-9260(87)90002-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-9260(87)90002-2","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016883956","display_name":"Janusz Brzozowski","orcid":"https://orcid.org/0000-0003-3390-2767"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"J.A. Brzozowski","raw_affiliation_strings":["Department of Computer Science, University of Waterloo, Waterloo, Ontario, Canada","Univ. of Waterloo,Waterloo,Ont.,Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Univ. of Waterloo,Waterloo,Ont.,Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013954312","display_name":"Michael Yoeli","orcid":null},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"M. Yoeli","raw_affiliation_strings":["Department of Computer Science, Technion, Haifa, Israel","Technion , Haifa , Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Technion, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]},{"raw_affiliation_string":"Technion , Haifa , Israel","institution_ids":["https://openalex.org/I174306211"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2150,"currency":"USD","value_usd":2150},"apc_paid":null,"fwci":1.597,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.80995922,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":"2","first_page":"103","last_page":"122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8454104661941528},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7321600317955017},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5746430158615112},{"id":"https://openalex.org/keywords/cascade","display_name":"Cascade","score":0.5282884240150452},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48575809597969055},{"id":"https://openalex.org/keywords/transmission-gate","display_name":"Transmission gate","score":0.4786599576473236},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4621011018753052},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3554261326789856},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.33930641412734985},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30077064037323},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22148141264915466},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.19610309600830078},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10824951529502869}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8454104661941528},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7321600317955017},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5746430158615112},{"id":"https://openalex.org/C34146451","wikidata":"https://www.wikidata.org/wiki/Q5048094","display_name":"Cascade","level":2,"score":0.5282884240150452},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48575809597969055},{"id":"https://openalex.org/C2780949067","wikidata":"https://www.wikidata.org/wiki/Q1136752","display_name":"Transmission gate","level":4,"score":0.4786599576473236},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4621011018753052},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3554261326789856},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.33930641412734985},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30077064037323},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22148141264915466},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.19610309600830078},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10824951529502869},{"id":"https://openalex.org/C42360764","wikidata":"https://www.wikidata.org/wiki/Q83588","display_name":"Chemical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0167-9260(87)90002-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-9260(87)90002-2","pdf_url":null,"source":{"id":"https://openalex.org/S139392130","display_name":"Integration","issn_l":"0167-9260","issn":["0167-9260","1872-7522"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Integration","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320310207","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33"},{"id":"https://openalex.org/F4320322676","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68"},{"id":"https://openalex.org/F4320323339","display_name":"Universidade de S\u00e3o Paulo","ror":"https://ror.org/036rp1748"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1487244328","https://openalex.org/W1627001377","https://openalex.org/W1983253480","https://openalex.org/W2059454390","https://openalex.org/W2089448146","https://openalex.org/W2319160178","https://openalex.org/W4248066563","https://openalex.org/W6673018402"],"related_works":["https://openalex.org/W2034971177","https://openalex.org/W2074526596","https://openalex.org/W2169337913","https://openalex.org/W4242010157","https://openalex.org/W2148047679","https://openalex.org/W3166523576","https://openalex.org/W3114476551","https://openalex.org/W2894516693","https://openalex.org/W2768607109","https://openalex.org/W2136100315"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
