{"id":"https://openalex.org/W2090521406","doi":"https://doi.org/10.1016/0167-739x(92)90035-a","title":"Implementation of a synchronous communication in a loosely coupled system: A correctness proof","display_name":"Implementation of a synchronous communication in a loosely coupled system: A correctness proof","publication_year":1992,"publication_date":"1992-07-01","ids":{"openalex":"https://openalex.org/W2090521406","doi":"https://doi.org/10.1016/0167-739x(92)90035-a","mag":"2090521406"},"language":"en","primary_location":{"id":"doi:10.1016/0167-739x(92)90035-a","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-739x(92)90035-a","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060055067","display_name":"Andrea Masini","orcid":"https://orcid.org/0000-0002-2466-0631"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Masini","raw_affiliation_strings":["Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia, 40, Pisa, Italy","Dipartimento di Informatica Universit\u00e0 di Pisa Corso Italia 40 Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia, 40, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Dipartimento di Informatica Universit\u00e0 di Pisa Corso Italia 40 Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051951613","display_name":"Marco Danelutto","orcid":"https://orcid.org/0000-0002-7433-376X"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]},{"id":"https://openalex.org/I4210118406","display_name":"Hewlett-Packard (Italy)","ror":"https://ror.org/01r4g9k61","country_code":"IT","type":"company","lineage":["https://openalex.org/I1324840837","https://openalex.org/I4210118406"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Danelutto","raw_affiliation_strings":["Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia, 40, Pisa, Italy","Pisa Science Center, Hewlett Packard Laboratories, Corso Italia, 115, Pisa, Italy","Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia 40, Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia, 40, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Pisa Science Center, Hewlett Packard Laboratories, Corso Italia, 115, Pisa, Italy","institution_ids":["https://openalex.org/I4210118406"]},{"raw_affiliation_string":"Dipartimento di Informatica, Universit\u00e0 di Pisa, Corso Italia 40, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":3000,"currency":"USD","value_usd":3000},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.23981779,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"8","issue":"1-3","first_page":"137","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9079931974411011},{"id":"https://openalex.org/keywords/liveness","display_name":"Liveness","score":0.8771525621414185},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.7863911390304565},{"id":"https://openalex.org/keywords/formalism","display_name":"Formalism (music)","score":0.5884363055229187},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5621556043624878},{"id":"https://openalex.org/keywords/temporal-logic","display_name":"Temporal logic","score":0.5380427837371826},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.5181899666786194},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.4960099160671234},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.47927138209342957},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.44786447286605835},{"id":"https://openalex.org/keywords/linear-temporal-logic","display_name":"Linear temporal logic","score":0.4411199688911438}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9079931974411011},{"id":"https://openalex.org/C15569618","wikidata":"https://www.wikidata.org/wiki/Q3561421","display_name":"Liveness","level":2,"score":0.8771525621414185},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7863911390304565},{"id":"https://openalex.org/C73301696","wikidata":"https://www.wikidata.org/wiki/Q5469984","display_name":"Formalism (music)","level":3,"score":0.5884363055229187},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5621556043624878},{"id":"https://openalex.org/C25016198","wikidata":"https://www.wikidata.org/wiki/Q781833","display_name":"Temporal logic","level":2,"score":0.5380427837371826},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.5181899666786194},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.4960099160671234},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.47927138209342957},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.44786447286605835},{"id":"https://openalex.org/C4777664","wikidata":"https://www.wikidata.org/wiki/Q1536492","display_name":"Linear temporal logic","level":2,"score":0.4411199688911438},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C558565934","wikidata":"https://www.wikidata.org/wiki/Q2743","display_name":"Musical","level":2,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0167-739x(92)90035-a","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-739x(92)90035-a","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1198182","https://openalex.org/W84580998","https://openalex.org/W1597925378","https://openalex.org/W2000138546","https://openalex.org/W2040127143","https://openalex.org/W2048355938","https://openalex.org/W2067441543","https://openalex.org/W2110425399","https://openalex.org/W2117189826","https://openalex.org/W2903097848","https://openalex.org/W3144368627","https://openalex.org/W4211008702","https://openalex.org/W6600053035"],"related_works":["https://openalex.org/W2082472813","https://openalex.org/W2147348835","https://openalex.org/W3005566532","https://openalex.org/W278680301","https://openalex.org/W2164319435","https://openalex.org/W2131064738","https://openalex.org/W2350953867","https://openalex.org/W1592102986","https://openalex.org/W2477338659","https://openalex.org/W1967076997"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}