{"id":"https://openalex.org/W2073933388","doi":"https://doi.org/10.1016/0167-739x(92)90006-w","title":"A novel paradigm of parallel computation and its use to implement simple high-performance hardware","display_name":"A novel paradigm of parallel computation and its use to implement simple high-performance hardware","publication_year":1992,"publication_date":"1992-04-01","ids":{"openalex":"https://openalex.org/W2073933388","doi":"https://doi.org/10.1016/0167-739x(92)90006-w","mag":"2073933388"},"language":"en","primary_location":{"id":"doi:10.1016/0167-739x(92)90006-w","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-739x(92)90006-w","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037848636","display_name":"Reiner W. Hartenstein","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"R.W Hartenstein","raw_affiliation_strings":["Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059428435","display_name":"A. G. Hirschbiel","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"A.G Hirschbiel","raw_affiliation_strings":["Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110547288","display_name":"K. Schmidt","orcid":null},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"K Schmidt","raw_affiliation_strings":["Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101745225","display_name":"Matthias Weber","orcid":"https://orcid.org/0000-0003-2691-2203"},"institutions":[{"id":"https://openalex.org/I153267046","display_name":"University of Kaiserslautern","ror":"https://ror.org/04zrf7b53","country_code":"DE","type":"education","lineage":["https://openalex.org/I153267046"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M Weber","raw_affiliation_strings":["Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany"],"affiliations":[{"raw_affiliation_string":"Universit\u00e4t Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, W-6750 Kaiserslautern, Germany","institution_ids":["https://openalex.org/I153267046"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5037848636"],"corresponding_institution_ids":["https://openalex.org/I153267046"],"apc_list":{"value":3340,"currency":"USD","value_usd":3340},"apc_paid":null,"fwci":2.2726,"has_fulltext":false,"cited_by_count":53,"citation_normalized_percentile":{"value":0.89863548,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"7","issue":"2-3","first_page":"181","last_page":"198"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9704999923706055,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9666000008583069,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8983837366104126},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.7113862633705139},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.6693975329399109},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6029093861579895},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5711547136306763},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5071775913238525},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4931871294975281},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48487338423728943},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.4728660583496094},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43229252099990845},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32169678807258606},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3213038146495819},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.20569950342178345},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1311509609222412},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09394210577011108}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8983837366104126},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.7113862633705139},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.6693975329399109},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6029093861579895},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5711547136306763},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5071775913238525},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4931871294975281},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48487338423728943},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4728660583496094},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43229252099990845},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32169678807258606},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3213038146495819},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.20569950342178345},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1311509609222412},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09394210577011108},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0167-739x(92)90006-w","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0167-739x(92)90006-w","pdf_url":null,"source":{"id":"https://openalex.org/S186357190","display_name":"Future Generation Computer Systems","issn_l":"0167-739X","issn":["0167-739X","1872-7115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Future Generation Computer Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320323015","display_name":"Bundesministerium f\u00fcr Forschung und Technologie","ror":"https://ror.org/04pz7b180"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W11019726","https://openalex.org/W65529465","https://openalex.org/W78891485","https://openalex.org/W1543377676","https://openalex.org/W1666015432","https://openalex.org/W1967575124","https://openalex.org/W1990199656","https://openalex.org/W2023633366","https://openalex.org/W2128221687","https://openalex.org/W2152617854","https://openalex.org/W2153580689","https://openalex.org/W2158468079","https://openalex.org/W2796603620","https://openalex.org/W2995746888","https://openalex.org/W6600050602","https://openalex.org/W6600428456","https://openalex.org/W6602636843","https://openalex.org/W6603272561","https://openalex.org/W6682493222","https://openalex.org/W6682928080","https://openalex.org/W6750609642","https://openalex.org/W6813128189","https://openalex.org/W7014199051"],"related_works":["https://openalex.org/W2918361313","https://openalex.org/W2249862794","https://openalex.org/W2611005572","https://openalex.org/W4200536635","https://openalex.org/W4386568676","https://openalex.org/W4319952061","https://openalex.org/W4280636456","https://openalex.org/W4388913998","https://openalex.org/W4310584535","https://openalex.org/W4295935044"],"abstract_inverted_index":null,"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}