{"id":"https://openalex.org/W2013441639","doi":"https://doi.org/10.1016/0165-6074(94)90050-7","title":"A bit-serial VLSI architecture for the 2-D discrete cosine transform","display_name":"A bit-serial VLSI architecture for the 2-D discrete cosine transform","publication_year":1994,"publication_date":"1994-12-01","ids":{"openalex":"https://openalex.org/W2013441639","doi":"https://doi.org/10.1016/0165-6074(94)90050-7","mag":"2013441639"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(94)90050-7","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(94)90050-7","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020546183","display_name":"A. Tatsaki","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Anna Tatsaki","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5111773679","display_name":"Costas E. Goutis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Costas Goutis","raw_affiliation_strings":["VLSI Design Laboratory, Department of Electrical Engineering University of Patras, Rio, 26110 Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Department of Electrical Engineering University of Patras, Rio, 26110 Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15877329,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"40","issue":"10-12","first_page":"829","last_page":"832"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9855999946594238,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.8895632028579712},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.802590012550354},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7825505137443542},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6559188961982727},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5786381363868713},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5081980228424072},{"id":"https://openalex.org/keywords/16-bit","display_name":"16-bit","score":0.48568305373191833},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47944656014442444},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4331439435482025},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4120236337184906},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3862813413143158},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3365955054759979},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3276422619819641},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24494248628616333},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1142149269580841},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09341999888420105},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.09102407097816467},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.0880948007106781},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06842100620269775}],"concepts":[{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.8895632028579712},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.802590012550354},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7825505137443542},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6559188961982727},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5786381363868713},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5081980228424072},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.48568305373191833},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47944656014442444},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4331439435482025},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4120236337184906},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3862813413143158},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3365955054759979},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3276422619819641},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24494248628616333},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1142149269580841},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09341999888420105},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.09102407097816467},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0880948007106781},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06842100620269775},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(94)90050-7","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(94)90050-7","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2031614119","https://openalex.org/W2077300501","https://openalex.org/W2100177142","https://openalex.org/W2107142624","https://openalex.org/W2112019074","https://openalex.org/W2143214358","https://openalex.org/W6675863704"],"related_works":["https://openalex.org/W2015155483","https://openalex.org/W2022568231","https://openalex.org/W2333351870","https://openalex.org/W2514848073","https://openalex.org/W3006978612","https://openalex.org/W1880893747","https://openalex.org/W1920855512","https://openalex.org/W3040396756","https://openalex.org/W2185308089","https://openalex.org/W4385625874"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
