{"id":"https://openalex.org/W2083161376","doi":"https://doi.org/10.1016/0165-6074(93)90133-6","title":"Some practical considerations for the implementer of the SCI network","display_name":"Some practical considerations for the implementer of the SCI network","publication_year":1993,"publication_date":"1993-09-01","ids":{"openalex":"https://openalex.org/W2083161376","doi":"https://doi.org/10.1016/0165-6074(93)90133-6","mag":"2083161376"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(93)90133-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(93)90133-6","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009247593","display_name":"Vincent Habchi","orcid":null},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Vincent Habchi","raw_affiliation_strings":["Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France"],"affiliations":[{"raw_affiliation_string":"Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030087793","display_name":"Ulrich Finger","orcid":null},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ulrich Finger","raw_affiliation_strings":["Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France"],"affiliations":[{"raw_affiliation_string":"Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026512699","display_name":"Ciaran O'Donnell","orcid":null},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ciaran O'Donnell","raw_affiliation_strings":["Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France"],"affiliations":[{"raw_affiliation_string":"Department Informatique, T\u00e9l\u00e9com Paris, 46 rue Barrault, 75634 Paris Cedex 13, France","institution_ids":["https://openalex.org/I12356871"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5009247593"],"corresponding_institution_ids":["https://openalex.org/I12356871"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19460557,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"38","issue":"1-5","first_page":"109","last_page":"118"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.92331862449646},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.718481183052063},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5987420678138733},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.5724020600318909},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.5684275031089783},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.5600978136062622},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5382909774780273},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.5360363721847534},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.528465211391449},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5224907994270325},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.46553483605384827},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4365927278995514},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34745773673057556},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27613547444343567},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.24182617664337158},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.23295825719833374},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16596490144729614},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.08060240745544434}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.92331862449646},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.718481183052063},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5987420678138733},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.5724020600318909},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.5684275031089783},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.5600978136062622},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5382909774780273},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.5360363721847534},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.528465211391449},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5224907994270325},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.46553483605384827},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4365927278995514},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34745773673057556},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27613547444343567},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.24182617664337158},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.23295825719833374},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16596490144729614},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.08060240745544434},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(93)90133-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(93)90133-6","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1533933640","https://openalex.org/W1969243435","https://openalex.org/W2101334300","https://openalex.org/W2129975056","https://openalex.org/W2157381427","https://openalex.org/W2188450683","https://openalex.org/W6683233915"],"related_works":["https://openalex.org/W1539379314","https://openalex.org/W2045183646","https://openalex.org/W2014709025","https://openalex.org/W2155019192","https://openalex.org/W4249035840","https://openalex.org/W2162409446","https://openalex.org/W2109463584","https://openalex.org/W1964071618","https://openalex.org/W3125341812","https://openalex.org/W2765822612"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
