{"id":"https://openalex.org/W2037304301","doi":"https://doi.org/10.1016/0165-6074(92)90314-w","title":"A behavioral approach to testability analysis for neural networks","display_name":"A behavioral approach to testability analysis for neural networks","publication_year":1992,"publication_date":"1992-09-01","ids":{"openalex":"https://openalex.org/W2037304301","doi":"https://doi.org/10.1016/0165-6074(92)90314-w","mag":"2037304301"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(92)90314-w","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(92)90314-w","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009147954","display_name":"Vincenzo Piuri","orcid":"https://orcid.org/0000-0003-3178-8198"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Vincenzo Piuri","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109877399","display_name":"Mariagiovanna Sami","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mariagiovanna Sami","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014181688","display_name":"Donatella Sciuto","orcid":"https://orcid.org/0000-0001-9030-6940"},"institutions":[{"id":"https://openalex.org/I79940851","display_name":"University of Brescia","ror":"https://ror.org/02q2d2610","country_code":"IT","type":"education","lineage":["https://openalex.org/I79940851"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Donatella Sciuto","raw_affiliation_strings":["Department of Industrial Automation, Universita' di Brescia via Valotti 9, I-25060 Brescia, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Industrial Automation, Universita' di Brescia via Valotti 9, I-25060 Brescia, Italy","institution_ids":["https://openalex.org/I79940851"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020591837","display_name":"R. Stefanelli","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Renato Stefanelli","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano piazza L. da Vinci 32, I-20133 Milano, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5009147954"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.14540257,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"35","issue":"1-5","first_page":"181","last_page":"186"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11689","display_name":"Adversarial Robustness in Machine Learning","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.8648348450660706},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8192006945610046},{"id":"https://openalex.org/keywords/controllability","display_name":"Controllability","score":0.6952854990959167},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.6900930404663086},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.632239818572998},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.6018776297569275},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5572922229766846},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4885317087173462},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4657970368862152},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4289868474006653},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4135403037071228},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3682537078857422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33379626274108887},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.32485276460647583},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2697491943836212},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.21254009008407593},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.090567946434021}],"concepts":[{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.8648348450660706},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8192006945610046},{"id":"https://openalex.org/C48209547","wikidata":"https://www.wikidata.org/wiki/Q1331104","display_name":"Controllability","level":2,"score":0.6952854990959167},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.6900930404663086},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.632239818572998},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.6018776297569275},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5572922229766846},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4885317087173462},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4657970368862152},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4289868474006653},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4135403037071228},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3682537078857422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33379626274108887},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32485276460647583},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2697491943836212},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.21254009008407593},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.090567946434021},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(92)90314-w","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(92)90314-w","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W230936071","https://openalex.org/W368355272","https://openalex.org/W2032548947","https://openalex.org/W2051385641","https://openalex.org/W2128084896","https://openalex.org/W2155545781","https://openalex.org/W3146266578","https://openalex.org/W6609008272","https://openalex.org/W6612623446","https://openalex.org/W6679062898","https://openalex.org/W6682331929","https://openalex.org/W6683237566","https://openalex.org/W6792817525"],"related_works":["https://openalex.org/W2332386680","https://openalex.org/W1983142522","https://openalex.org/W1986570998","https://openalex.org/W2782529250","https://openalex.org/W2037921533","https://openalex.org/W2508171592","https://openalex.org/W2801563517","https://openalex.org/W2130864543","https://openalex.org/W2068126039","https://openalex.org/W2041749520"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}