{"id":"https://openalex.org/W1993234270","doi":"https://doi.org/10.1016/0165-6074(92)90112-k","title":"Avoidance of deadlock in loop structures \u2014 a two process solution","display_name":"Avoidance of deadlock in loop structures \u2014 a two process solution","publication_year":1992,"publication_date":"1992-02-01","ids":{"openalex":"https://openalex.org/W1993234270","doi":"https://doi.org/10.1016/0165-6074(92)90112-k","mag":"1993234270"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(92)90112-k","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(92)90112-k","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017997194","display_name":"P. Pramanik","orcid":null},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"P. Pramanik","raw_affiliation_strings":["Department of Computer Science & Engineering, Jadavpur University, Calcutta 700 032, India","Department of Computer Science and Engineering, Jadavpur University, Calcutta, 700 032, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, Jadavpur University, Calcutta 700 032, India","institution_ids":["https://openalex.org/I170979836"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, Jadavpur University, Calcutta, 700 032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103186544","display_name":"Pradip Kumar Das","orcid":"https://orcid.org/0000-0003-2045-7828"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P.K. Das","raw_affiliation_strings":["Department of Computer Science & Engineering, Jadavpur University, Calcutta 700 032, India","Department of Computer Science and Engineering, Jadavpur University, Calcutta, 700 032, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, Jadavpur University, Calcutta 700 032, India","institution_ids":["https://openalex.org/I170979836"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, Jadavpur University, Calcutta, 700 032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089923787","display_name":"Anup Bandyopadhyay","orcid":"https://orcid.org/0000-0001-6215-8530"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"A.K. Bandyopadhyay","raw_affiliation_strings":["Department of Electronics & Telecomm. Engg., Jadavpur University, Calcutta 700 032, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Telecomm. Engg., Jadavpur University, Calcutta 700 032, India","institution_ids":["https://openalex.org/I170979836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111641453","display_name":"D.Q.M. Fay","orcid":null},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"D.Q.M. Fay","raw_affiliation_strings":["Department of Computer Science, Queen's University of Belfast, Belfast BT7 1NN, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Queen's University of Belfast, Belfast BT7 1NN, Northern Ireland, UK","institution_ids":["https://openalex.org/I126231945"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5017997194"],"corresponding_institution_ids":["https://openalex.org/I170979836"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.16366078,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"1-5","first_page":"103","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9054875373840332},{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.8148822784423828},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.6804860234260559},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.572698712348938},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.48342621326446533},{"id":"https://openalex.org/keywords/deadlock-prevention-algorithms","display_name":"Deadlock prevention algorithms","score":0.4697430729866028},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3734997510910034},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21987101435661316},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.04819557070732117}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9054875373840332},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.8148822784423828},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.6804860234260559},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.572698712348938},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.48342621326446533},{"id":"https://openalex.org/C113429609","wikidata":"https://www.wikidata.org/wiki/Q4060699","display_name":"Deadlock prevention algorithms","level":3,"score":0.4697430729866028},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3734997510910034},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21987101435661316},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.04819557070732117},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(92)90112-k","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(92)90112-k","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2062613109","https://openalex.org/W2065501971","https://openalex.org/W2110425399","https://openalex.org/W2134059996","https://openalex.org/W2154323564","https://openalex.org/W4211008702","https://openalex.org/W7052597933"],"related_works":["https://openalex.org/W2050076411","https://openalex.org/W2001478969","https://openalex.org/W1542183432","https://openalex.org/W2360686363","https://openalex.org/W1900787600","https://openalex.org/W2136552483","https://openalex.org/W2166954426","https://openalex.org/W125668343","https://openalex.org/W3175828148","https://openalex.org/W2363501516"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
