{"id":"https://openalex.org/W2080325608","doi":"https://doi.org/10.1016/0165-6074(90)90320-9","title":"The synthesis of deadlock-free interprocess communications","display_name":"The synthesis of deadlock-free interprocess communications","publication_year":1990,"publication_date":"1990-08-01","ids":{"openalex":"https://openalex.org/W2080325608","doi":"https://doi.org/10.1016/0165-6074(90)90320-9","mag":"2080325608"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(90)90320-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90320-9","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110259251","display_name":"G. F. Carpenter","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090916","display_name":"Triangle","ror":"https://ror.org/00fhbr831","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I4210090916"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Geoffrey F. Carpenter","raw_affiliation_strings":["Department of Electrical and Electronic Engineering and Applied Physics, Aston University, Aston Triangle, Birmingham B4 7ET, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering and Applied Physics, Aston University, Aston Triangle, Birmingham B4 7ET, USA","institution_ids":["https://openalex.org/I4210090916"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5110259251"],"corresponding_institution_ids":["https://openalex.org/I4210090916"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.22808898,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"30","issue":"1-5","first_page":"695","last_page":"701"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11125","display_name":"Petri Nets in System Modeling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11125","display_name":"Petri Nets in System Modeling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.9241207838058472},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.896271824836731},{"id":"https://openalex.org/keywords/inter-process-communication","display_name":"Inter-process communication","score":0.7622780799865723},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.7292643785476685},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.60768723487854},{"id":"https://openalex.org/keywords/deadlock-prevention-algorithms","display_name":"Deadlock prevention algorithms","score":0.5778923034667969},{"id":"https://openalex.org/keywords/concurrency-control","display_name":"Concurrency control","score":0.42007261514663696},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21870964765548706}],"concepts":[{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.9241207838058472},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.896271824836731},{"id":"https://openalex.org/C204156049","wikidata":"https://www.wikidata.org/wiki/Q751436","display_name":"Inter-process communication","level":2,"score":0.7622780799865723},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.7292643785476685},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.60768723487854},{"id":"https://openalex.org/C113429609","wikidata":"https://www.wikidata.org/wiki/Q4060699","display_name":"Deadlock prevention algorithms","level":3,"score":0.5778923034667969},{"id":"https://openalex.org/C84511453","wikidata":"https://www.wikidata.org/wiki/Q2914952","display_name":"Concurrency control","level":3,"score":0.42007261514663696},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21870964765548706},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(90)90320-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90320-9","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.6399999856948853,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W251317517","https://openalex.org/W989147434","https://openalex.org/W1006098191","https://openalex.org/W1994188141","https://openalex.org/W1995461270","https://openalex.org/W2033742931","https://openalex.org/W2055717497","https://openalex.org/W2079946612","https://openalex.org/W2121186838","https://openalex.org/W2131377110","https://openalex.org/W2133201251","https://openalex.org/W2134059996","https://openalex.org/W2220064683","https://openalex.org/W2735234633","https://openalex.org/W3035757797","https://openalex.org/W4302402540","https://openalex.org/W6625949002","https://openalex.org/W6658734771","https://openalex.org/W6679354352","https://openalex.org/W6679658319","https://openalex.org/W6689048302"],"related_works":["https://openalex.org/W2050076411","https://openalex.org/W4226119751","https://openalex.org/W1542183432","https://openalex.org/W2340131066","https://openalex.org/W2358822739","https://openalex.org/W3175828148","https://openalex.org/W1506291714","https://openalex.org/W2363501516","https://openalex.org/W4231261802","https://openalex.org/W2361416822"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
