{"id":"https://openalex.org/W2071953011","doi":"https://doi.org/10.1016/0165-6074(90)90315-z","title":"Pipelining a memory based CISC processor","display_name":"Pipelining a memory based CISC processor","publication_year":1990,"publication_date":"1990-08-01","ids":{"openalex":"https://openalex.org/W2071953011","doi":"https://doi.org/10.1016/0165-6074(90)90315-z","mag":"2071953011"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(90)90315-z","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90315-z","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007999698","display_name":"J.P.C.F.H. Smeets","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"J.P.C.F.H. Smeets","raw_affiliation_strings":["Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035006843","display_name":"W.J. Withagen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"W.J. Withagen","raw_affiliation_strings":["Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103583387","display_name":"M.P.J. Stevens","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M.P.J. Stevens","raw_affiliation_strings":["Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering Section: Digital Systems Eindhoven University of Technology, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5007999698"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3291,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.6416185,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"30","issue":"1-5","first_page":"665","last_page":"672"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.905956506729126},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.4742490351200104},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.46334347128868103},{"id":"https://openalex.org/keywords/instructions-per-cycle","display_name":"Instructions per cycle","score":0.44582098722457886},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.44031837582588196},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.43255701661109924},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4214737117290497},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4137054681777954},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3957148790359497},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.3500216007232666},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2984504699707031},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.16399329900741577}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.905956506729126},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.4742490351200104},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.46334347128868103},{"id":"https://openalex.org/C156972235","wikidata":"https://www.wikidata.org/wiki/Q1443434","display_name":"Instructions per cycle","level":3,"score":0.44582098722457886},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.44031837582588196},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.43255701661109924},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4214737117290497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4137054681777954},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3957148790359497},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.3500216007232666},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2984504699707031},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.16399329900741577},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(90)90315-z","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90315-z","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5899999737739563,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W165229226","https://openalex.org/W1522888794","https://openalex.org/W1964750864","https://openalex.org/W2122547260","https://openalex.org/W2160760912","https://openalex.org/W2169732648","https://openalex.org/W2173501262","https://openalex.org/W2592443053","https://openalex.org/W4249382013","https://openalex.org/W6685303630","https://openalex.org/W6734314023"],"related_works":["https://openalex.org/W2164026451","https://openalex.org/W182515070","https://openalex.org/W2806352516","https://openalex.org/W4367172762","https://openalex.org/W4310584696","https://openalex.org/W2547383257","https://openalex.org/W4280644180","https://openalex.org/W1680705574","https://openalex.org/W4387540511","https://openalex.org/W1986869459"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
