{"id":"https://openalex.org/W2017940836","doi":"https://doi.org/10.1016/0165-6074(90)90189-g","title":"Testing of serial input convolvers","display_name":"Testing of serial input convolvers","publication_year":1990,"publication_date":"1990-03-01","ids":{"openalex":"https://openalex.org/W2017940836","doi":"https://doi.org/10.1016/0165-6074(90)90189-g","mag":"2017940836"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(90)90189-g","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90189-g","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006809009","display_name":"Luca Breveglieri","orcid":"https://orcid.org/0000-0001-5294-6840"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Breveglieri","raw_affiliation_strings":["Department of Electronics Politecnico di Milano, Milano, Italy","Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018270534","display_name":"L. Dadda","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luigi Dadda","raw_affiliation_strings":["Department of Electronics Politecnico di Milano, Milano, Italy","Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Politecnico di Milano, Milano, Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014181688","display_name":"Donatella Sciuto","orcid":"https://orcid.org/0000-0001-9030-6940"},"institutions":[{"id":"https://openalex.org/I79940851","display_name":"University of Brescia","ror":"https://ror.org/02q2d2610","country_code":"IT","type":"education","lineage":["https://openalex.org/I79940851"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Donatella Sciuto","raw_affiliation_strings":["Department of Industrial Automation Universita' di Brescia, Brescia, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Industrial Automation Universita' di Brescia, Brescia, Italy","institution_ids":["https://openalex.org/I79940851"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.14285714,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"28","issue":"1-5","first_page":"283","last_page":"290"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.982200026512146,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9671000242233276,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.912972092628479},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.8623350262641907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8599275946617126},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.6485787034034729},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.45535093545913696},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45214778184890747},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43826955556869507},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4309231638908386},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4194728434085846},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41334787011146545},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3635897636413574},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3580906391143799},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.16924422979354858},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0965692400932312},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08480298519134521}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.912972092628479},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.8623350262641907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8599275946617126},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.6485787034034729},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.45535093545913696},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45214778184890747},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43826955556869507},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4309231638908386},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4194728434085846},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41334787011146545},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3635897636413574},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3580906391143799},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.16924422979354858},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0965692400932312},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08480298519134521},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1016/0165-6074(90)90189-g","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(90)90189-g","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},{"id":"pmh:oai:re.public.polimi.it:11311/569744","is_oa":false,"landing_page_url":"http://dl.acm.org/citation.cfm?id=86038.86126&preflayout=tabs","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W183183201","https://openalex.org/W1590529339","https://openalex.org/W1595537116","https://openalex.org/W2007904745","https://openalex.org/W2017369466","https://openalex.org/W2045455812","https://openalex.org/W2049872805","https://openalex.org/W2086721470","https://openalex.org/W2103913274","https://openalex.org/W3141715043","https://openalex.org/W6607456618","https://openalex.org/W6635259815","https://openalex.org/W6661704293","https://openalex.org/W6675566014","https://openalex.org/W6792407475"],"related_works":["https://openalex.org/W2157191248","https://openalex.org/W2107525390","https://openalex.org/W2150046587","https://openalex.org/W2164493372","https://openalex.org/W2153086993","https://openalex.org/W2114980936","https://openalex.org/W2118697956","https://openalex.org/W4249526199","https://openalex.org/W2128920253","https://openalex.org/W2373135325"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-21T06:12:48.119943","created_date":"2025-10-10T00:00:00"}